1. 17 6月, 2015 2 次提交
  2. 10 6月, 2015 1 次提交
  3. 30 1月, 2015 1 次提交
    • D
      pinctrl: rockchip: Only mask interrupts; never disable · 5ae0c7ad
      Doug Anderson 提交于
      The Rockchip GPIO interrupt controller totally throws away all status
      about an interrupt when you "disable" the interrupt.  That has
      unfortunate consequences in the following situation:
      
      1. An edge-triggered interrupt is enabled and should wake the system.
      2. System suspend happens: interrupt is disabled and marked for wake.
      3. rockchip_irq_suspend() reenables the interrupt so we can wake.
      4. Interrupt happens when asleep.
      5. rockchip_irq_resume() redisables the interrupt.
      6. Disabling the interrupt throws away all status about it.
      7. Normal system resume happens and we enable the interrupt again,
         since we threw away status about the interrupt we don't know it
         fired while suspended.  Even worse: if we need both edges of the
         interrupt the logic to swap edges never runs.
      
      Note: even if we somehow can post the status about wakeup interrupts
      in rockchip_irq_resume() we would still have a window of losing any
      edges that came in while interrupts were disabled.
      
      If we use mask only then we don't need to worry.  The GPIO Interrupt
      controller keeps track of pending interrupts that are enabled and just
      masked.
      
      There was no real strong reason to support the enable/disable
      functionality (other than that it seemed right), so let's go back to
      just supporting mask/unmask but actually map it to the real
      mask/unmask.  This ends up with slightly different (and more correct)
      behavior than before (f2dd028c pinctrl: rockchip: Fix
      enable/disable/mask/unmask).
      Signed-off-by: NDoug Anderson <dianders@chromium.org>
      Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      5ae0c7ad
  4. 14 1月, 2015 1 次提交
  5. 12 1月, 2015 1 次提交
    • S
      pinctrl: pinconf-generic: Allow driver to specify DT params · dd4d01f7
      Soren Brinkmann 提交于
      Additionally to the generic DT parameters, allow drivers to provide
      driver-specific DT parameters to be used with the generic parser
      infrastructure.
      
      To achieve this 'struct pinctrl_desc' is extended to pass custom pinconf
      option to the core. In order to pass this kind of information, the
      related data structures - 'struct pinconf_generic_dt_params',
      'pin_config_item' - are moved from pinconf internals to the
      pinconf-generic header.
      
      Additionally pinconfg-generic is refactored to not only iterate over the
      generic pinconf parameters but also take the parameters into account
      that are provided through the driver's 'struct pinctrl_desc'.
      In particular 'pinconf_generic_parse_dt_config()' and
      'pinconf_generic_dump' helpers are split into two parts each. In order
      to have a more generic helper that can be used to process the generic
      parameters as well as the driver-specific ones.
      
      v2:
       - fix typo
       - add missing documentation for @conf_items member in struct
       - rebase to pinctrl/devel: conflict in abx500
       - rename _pinconf_generic_dump() to pinconf_generic_dump_one()
       - removed '_' from _parse_dt_cfg()
       - removed BUG_ONs, error condition is handled in if statements
       - removed pinconf_generic_dump_group() & pinconf_generic_dump_pin
         helpers
         - fixed up corresponding call sites
         - renamed pinconf_generic_dump() to pinconf_generic_dump_pins()
         - added kernel-doc to pinconf_generic_dump_pins()
       - add kernel-doc
       - more verbose commit message
      Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com>
      Tested-by: NAndreas Färber <afaerber@suse.de>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      dd4d01f7
  6. 30 12月, 2014 2 次提交
    • D
      pinctrl: rockchip: Fix enable/disable/mask/unmask · f2dd028c
      Doug Anderson 提交于
      The Rockchip pinctrl driver was only implementing the "mask" and
      "unmask" operations though the hardware actually has two distinct
      things: enable/disable and mask/unmask.  It was implementing the
      "mask" operations as a hardware enable/disable and always leaving all
      interrupts unmasked.
      
      I believe that the old system had some downsides, specifically:
      - (Untested) if an interrupt went off while interrupts were "masked"
        it would be lost.  Now it will be kept track of.
      - If someone wanted to change an interrupt back into a GPIO (is such a
        thing sensible?) by calling irq_disable() it wouldn't actually take
        effect.  That's because Linux does some extra optimizations when
        there's no true "disable" function: it does a lazy mask.
      
      Let's actually implement enable/disable/mask/unmask properly.
      Signed-off-by: NDoug Anderson <dianders@chromium.org>
      Reviewed-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>
      Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      f2dd028c
    • D
      pinctrl: rockchip: Handle wakeup pins · 68bda47c
      Doug Anderson 提交于
      The rockchip pinctrl driver was using irq_gc_set_wake() as its
      implementation of irq_set_wake() but was totally ignoring everything
      that irq_gc_set_wake() did (which is to upkeep gc->wake_active).
      
      Let's fix that by setting gc->wake_active as GPIO_INTEN at suspend
      time and restoring GPIO_INTEN at resume time.
      
      NOTE a few quirks when thinking about this patch:
      - Rockchip pinctrl hardware supports both "disable/enable" and
        "mask/unmask".  Right now we only use "disable/enable" and present
        those to Linux as "mask/unmask".  This should be OK because
        enable/disable is optional and Linux will implement it in terms of
        mask/unmask.  At the moment we always tell hardware all interrupts
        are unmasked (the boot default).
      - At suspend time Linux tries to call "disable" on all interrupts and
        also enables wakeup on all wakeup interrupts.  One would think that
        since "disable" is implemented as "mask" when "disable" isn't
        provided and that since we were ignoring gc->wake_active that
        nothing would have woken us up.  That's not the case since Linux
        "optimizes" things and just leaves interrutps unmasked, assuming it
        could mask them later when they go off.  That meant that at suspend
        time all interrupts were actually being left enabled.
      
      With this patch random non-wakeup interrupts no longer wake the system
      up.  Wakeup interrupts still wake the system up.
      Signed-off-by: NDoug Anderson <dianders@chromium.org>
      Reviewed-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>
      Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      68bda47c
  7. 01 11月, 2014 2 次提交
  8. 30 10月, 2014 4 次提交
  9. 20 10月, 2014 1 次提交
  10. 04 9月, 2014 1 次提交
  11. 17 8月, 2014 1 次提交
  12. 23 7月, 2014 3 次提交
  13. 22 7月, 2014 1 次提交
  14. 11 7月, 2014 7 次提交
    • H
      pinctrl: rockchip: add support for rk3288 pin-controller · 304f077d
      Heiko Stübner 提交于
      The pin-controller of the new RK3288 contains all the quirks just added in
      the previous patches.
      Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      304f077d
    • H
      pinctrl: rockchip: support unrouted iomuxes per bank · 62f49226
      Heiko Stübner 提交于
      On the upcoming RK3288 SoC contain some unrouted pins in their banks. So while
      for example pin8 of bank5 stays pin8 with all its settings (register offset etc),
      pins 0 to 7 are not routed outside the SoC at all.
      Therefore add a flag to mark these unrouted iomuxes to prevent people from using
      them.
      Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      62f49226
    • H
      pinctrl: rockchip: enable iomuxes from pmu space · 95ec8ae4
      Heiko Stübner 提交于
      The upcoming rk3288 moves some iomux settings to the pmu register space.
      Therefore add a flag for this and adapt the mux functions accordingly.
      Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      95ec8ae4
    • H
      pinctrl: rockchip: add support for 4bit wide iomux settings · 03716e1d
      Heiko Stübner 提交于
      In the upcoming rk3288 SoC some iomux settings are 4bit wide instead of
      the regular 2bit. Therefore add a flag to mark iomuxes as such and adapt
      the mux-access as well as the offset calculation accordingly.
      Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      03716e1d
    • H
      pinctrl: rockchip: precalculate iomux offsets · 6bc0d121
      Heiko Stübner 提交于
      An upcoming SoC introduces an interesting quirk to iomux handling making the
      calculation of the iomux register-offset harder. To keep the complexity down
      when getting/setting the mux, precalculate the actual register offset at
      probe-time.
      Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      6bc0d121
    • H
      pinctrl: rockchip: generalize bank-quirks · fc72c923
      Heiko Stübner 提交于
      Upcoming Rockchip SoCs have additional quirks to handle. Currently they would
      be handled by giving the bank a special compatible property. But the nature
      of the new quirks would require a lot of them. Also as we want to move to the
      separate dw_gpio driver in the future, these bank-definitions should be
      extended at all.
      
      Describing the bank quirks this way also enables us to deprecate the special
      bank compatible string for bank0 on rk3188 and simplify the handling code.
      Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      fc72c923
    • F
      pinctrl: avoid duplicated calling enable_pinmux_setting for a pin · 2243a87d
      Fan Wu 提交于
      What the patch does:
      1. Call pinmux_disable_setting ahead of pinmux_enable_setting
        each time pinctrl_select_state is called
      2. Remove the HW disable operation in pinmux_disable_setting function.
      3. Remove the disable ops in struct pinmux_ops
      4. Remove all the disable ops users in current code base.
      
      Notes:
      1. Great thanks for the suggestion from Linus, Tony Lindgren and
         Stephen Warren and Everyone that shared comments on this patch.
      2. The patch also includes comment fixes from Stephen Warren.
      
      The reason why we do this:
      1. To avoid duplicated calling of the enable_setting operation
         without disabling operation inbetween which will let the pin
         descriptor desc->mux_usecount increase monotonously.
      2. The HW pin disable operation is not useful for any of the
         existing platforms.
         And this can be used to avoid the HW glitch after using the
         item #1 modification.
      
      In the following case, the issue can be reproduced:
      1. There is a driver that need to switch pin state dynamically,
         e.g. between "sleep" and "default" state
      2. The pin setting configuration in a DTS node may be like this:
      
        component a {
      	pinctrl-names = "default", "sleep";
      	pinctrl-0 = <&a_grp_setting &c_grp_setting>;
      	pinctrl-1 = <&b_grp_setting &c_grp_setting>;
        }
      
        The "c_grp_setting" config node is totally identical, maybe like
        following one:
      
        c_grp_setting: c_grp_setting {
      	pinctrl-single,pins = <GPIO48 AF6>;
        }
      
      3. When switching the pin state in the following official pinctrl
         sequence:
      	pin = pinctrl_get();
      	state = pinctrl_lookup_state(wanted_state);
      	pinctrl_select_state(state);
      	pinctrl_put();
      
      Test Result:
      1. The switch is completed as expected, that is: the device's
         pin configuration is changed according to the description in the
         "wanted_state" group setting
      2. The "desc->mux_usecount" of the corresponding pins in "c_group"
         is increased without being decreased, because the "desc" is for
         each physical pin while the setting is for each setting node
         in the DTS.
         Thus, if the "c_grp_setting" in pinctrl-0 is not disabled ahead
         of enabling "c_grp_setting" in pinctrl-1, the desc->mux_usecount
         will keep increasing without any chance to be decreased.
      
      According to the comments in the original code, only the setting,
      in old state but not in new state, will be "disabled" (calling
      pinmux_disable_setting), which is correct logic but not intact. We
      still need consider case that the setting is in both old state
      and new state. We can do this in the following two ways:
      
      1. Avoid to "enable"(calling pinmux_enable_setting) the "same pin
         setting" repeatedly
      2. "Disable"(calling pinmux_disable_setting) the "same pin setting",
         actually two setting instances, ahead of enabling them.
      
      Analysis:
      1. The solution #2 is better because it can avoid too much
         iteration.
      2. If we disable all of the settings in the old state and one of
         the setting(s) exist in the new state, the pins mux function
         change may happen when some SoC vendors defined the
         "pinctrl-single,function-off"
         in their DTS file.
         old_setting => disabled_setting => new_setting.
      3. In the pinmux framework, when a pin state is switched, the
         setting in the old state should be marked as "disabled".
      
      Conclusion:
      1. To Remove the HW disabling operation to above the glitch mentioned
         above.
      2. Handle the issue mentioned above by disabling all of the settings
         in old state and then enable the all of the settings in new state.
      Signed-off-by: NFan Wu <fwu@marvell.com>
      Acked-by: NStephen Warren <swarren@nvidia.com>
      Acked-by: NPatrice Chotard <patrice.chotard@st.com>
      Acked-by: NHeiko Stuebner <heiko@sntech.de>
      Acked-by: NMaxime Coquelin <maxime.coquelin@st.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      2243a87d
  15. 09 5月, 2014 6 次提交
  16. 24 4月, 2014 2 次提交
  17. 14 4月, 2014 3 次提交
  18. 25 11月, 2013 1 次提交