1. 10 7月, 2012 8 次提交
  2. 28 6月, 2012 1 次提交
  3. 21 6月, 2012 1 次提交
  4. 14 6月, 2012 5 次提交
  5. 07 6月, 2012 6 次提交
  6. 30 5月, 2012 1 次提交
  7. 16 5月, 2012 1 次提交
    • S
      ath9k_hw: Fix RTT calibration · 8a90555f
      Sujith Manoharan 提交于
      This patch fixes multiple issues with the current RTT
      implementation in ath9k.
      
      * The data that is obtained from the RTT interface registers
        are stored in 31:5 - mask out the extra bits when reading them.
      
      * A history buffer is maintained which is not needed at all.
        Remove this array and just store the baseband data for each
        chain (or bank).
      
      * A 'num_readings' variable was being used to handle the
        last entry. But it was being used in an improper manner, with
        the result that the RTT values were never being written
        to the RTT Interface registers. Fix this by using a simple
        flag.
      
      * Stop baseband operations before programming the calibration values
        to the HW.
      
      * Do not restore RX gain settings as part of RTT.
      Signed-off-by: NSujith Manoharan <c_manoha@qca.qualcomm.com>
      Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      8a90555f
  8. 24 4月, 2012 5 次提交
  9. 17 4月, 2012 2 次提交
  10. 13 4月, 2012 1 次提交
  11. 10 4月, 2012 1 次提交
    • R
      ath9k: recover ar9380 chips from rare stuck state · 01e18918
      Rajkumar Manoharan 提交于
      In the experiment with Azimuth ADEPT-n testbed where the APs transmit
      power was reduced to 25% and the signal strength was futher attenuated
      by 20dB and induced a path loss of ~7dB, the station was reporting
      beacon losses and the following issue were observed.
      
      * rx clear is stuck at low for more than 300ms
      * dcu chain and complete state is stuck at one of the hang signature
      
      This patch triggers the hang detection logic that recovers the chip
      from any of the above conditions. As the issue was originally reported
      in ChromeOs with AR9382 chips, this detection logic is enabled only for
      AR9380/2 chips.
      
      Cc: Paul Stewart <pstew@google.com>
      Reported-by: NGary Morain <gmorain@google.com>
      Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com>
      Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      01e18918
  12. 16 3月, 2012 5 次提交
  13. 13 3月, 2012 1 次提交
  14. 08 3月, 2012 1 次提交
  15. 28 2月, 2012 1 次提交