1. 11 2月, 2011 1 次提交
    • J
      ASoC: CX20442: fix wrong reg_cache_default content · 8e6bfb9b
      Janusz Krzysztofik 提交于
      Content of the CX20442's snd_soc_codec_driver.reg_cache_default pointed
      area, introduced with my recent NULL pointer dereferece fix (commit
      f019ee5f), occured wrong after further
      testing, more thorough than just booting successfully. There are two
      problems with it:
      
      1) It should read
      	(1 << CX20442_TELOUT) | (1 << CX20442_MIC),
         not
      	CX20442_TELOUT | CX20442_MIC.
      
      2) While correctly matching actual codec hardware state on boot when
         fixed per 1), a few more code modifications would still be required
         to reflect that state not only into register cache, but also force
         them into DAPM pins state, otherwise an inconsitency occures which
         may prevent further codec state changes from being applied correctly.
         As a result, the phone stops ringing after reboot, until someone
         picks up the handset for the first time.
      
      Revert that reg_cache_default content to a working, previous de facto
      default value of 0, in hope this change can still be accepted as an rc
      cycle fix.
      
      Created and tested against linux-2.6.38-rc4
      Signed-off-by: NJanusz Krzysztofik <jkrzyszt@tis.icnet.pl>
      Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
      Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
      8e6bfb9b
  2. 10 2月, 2011 1 次提交
  3. 04 2月, 2011 3 次提交
  4. 03 2月, 2011 1 次提交
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  6. 28 1月, 2011 2 次提交
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  10. 19 1月, 2011 8 次提交
  11. 17 1月, 2011 2 次提交
    • A
      ASoC: EP93xx: fixed LRCLK rate and DMA oper. in I2S code · 7322ce21
      Alexander Sverdlin 提交于
      Changelog:
      1. I2S module of EP93xx should be feed by 32bit DMA transfers. This is
      hardware limitation and that's the way original Cirrus's driver worked.
      This will fix distorted sound playback and make capture actually work in
      present ep93xx drivers.
      
      I've found, that author of code, on which modern ep93xx-i2s.c and
      ep93xx-pcm.c are based, had faced this problem also in 2007:
      http://blog.gmane.org/gmane.linux.ports.arm.cirrus/month=20070101/page=3
      
      Now SoC code uses his developments, but not overcomes the hardware
      issues. Some details from EP93xx users guide:
      
      Both I2S transmitter and receiver have similar 16x32bit FIFO, where they
      store 8 samples for both left and right channels. The FIFO is always
      32bit wide and should be properly aligned if you use samples of other
      width. Transmitter and receiver have configuration registers for
      selection of I2S word length (16, 24, 32). They are I2STXWrdLen and
      I2SRXWrdLen.
      
      Yes, EP93xx DMA can do byte, word and quad-word transfers. The width for
      transfers to and from peripherals is selected by particular module
      configuration. Lucky AC97 module has such configuration: AC97RXCRx
      registers, bit CM (Compact mode enable) switches between 16 and 32 bit
      samples. AC97TXCRx registers have the same bits for transmitters.
      ep93xx-ac97.c enables this compact mode and so has all the rights to use
      S16_LE format.
      No one has found such a configuration in I2S module until now in any
      Cirrus manuals. I2S module always feeds it's 32bit wide FIFO with 32bit
      samples consecutively for left and right channels. You cannot use 32-bit
      DMA transfers to transfer two 16-bit samples.
      
      So we can use two formats for AC97, but should remove all but S32_LE for
      I2S. Always using 32 bit chunks is not a problem for I2S, the codec I
      use uses less bits too (24), it's permitted by I2S standard.
      
      In proposed patch formats list shortened to just S32_LE, this makes all
      the DMA transactions right, while ALSA will do all sample format
      translation for us.
      
      2. Incorrect setting of LRCLK (2 times slower) in original ep93xx-i2s.c
      masks the first problem.
      
      DMA takes two 16 bit samples instead of one, overall sound speed seems
      to be normal, but you get actually 4000 sampling rate instead of
      requested 8000 and therefore some noise... This is also the reason why
      the capture function not worked at all in this driver...
      
      If we take a look into I2S specification, we will figure that LRCLK MUST
      be equal to sample rate, if we are talking about stereo (in mono too,
      but it's not our case at all).
      
      In proposed patch SCLK and LRCLK rates are corrected, assuming we always
      send 32 bits * 2 channels to codec.
      Signed-off-by: NAlexander Sverdlin <subaparts@yandex.ru>
      Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
      Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
      7322ce21
    • D
  12. 14 1月, 2011 1 次提交
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  17. 02 1月, 2011 1 次提交