1. 18 4月, 2014 9 次提交
  2. 17 4月, 2014 4 次提交
  3. 16 4月, 2014 8 次提交
  4. 15 4月, 2014 16 次提交
  5. 14 4月, 2014 3 次提交
    • J
      OMAPDSS: Change struct reg_field to dispc_reg_field · 5c348ba9
      Jyri Sarha 提交于
      Avoid colision with regmap's struct reg_field definition by renaming
      omapdss's struct reg_field to dispc_reg_field, and moving it inside
      dispc.c as that's the only place it is used.
      Signed-off-by: NJyri Sarha <jsarha@ti.com>
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      5c348ba9
    • J
      OMAPDSS: Take pixelclock unit change into account in hdmi_compute_acr() · a57a22c8
      Jyri Sarha 提交于
      Pixelclock unit change from kHz to Hz should be taken into account
      in CTS value calculations in hdmi_compute_acr().
      Signed-off-by: NJyri Sarha <jsarha@ti.com>
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      a57a22c8
    • T
      OMAPDSS: fix shared irq handlers · 0925afc9
      Tomi Valkeinen 提交于
      DSS uses shared irq handlers for DISPC and DSI, because on OMAP3, the
      DISPC and DSI share the same irq line.
      
      However, the irq handlers presume that the hardware is enabled, which,
      in theory, may not be the case with shared irq handlers. So if an
      interrupt happens while the DISPC/DSI is off, the kernel will halt as
      the irq handler tries to access the DISPC/DSI registers.
      
      In practice that should never happen, as both DSI and DISPC are in the
      same power domain. So if there's an IRQ for one of them, the other is
      also enabled. However, if CONFIG_DEBUG_SHIRQ is enabled, the kernel will
      generate a spurious IRQ, which then causes the problem.
      
      This patch adds an is_enabled field for both DISPC and DSI, which is
      used to track if the HW is enabled. For DISPC the code is slightly more
      complex, as the users of DISPC can register the interrupt handler, and
      we want to hide the is_enabled handling from the users of DISPC.
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      0925afc9