- 24 1月, 2011 1 次提交
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由 Linus Walleij 提交于
Implement a suggestion from Russell to drop the use of blockend interrupts altogether and instead rely on the data counter. Tested with error-free cards on U300, U8500 and RealView PB1176. Signed-off-by: NUlf Hansson <ulf.hansson@stericsson.com> Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 14 1月, 2011 1 次提交
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由 Rob Herring 提交于
Explicitly include err.h, of_address.h and of_irq.h. Make use of machine_is() conditional on PPC. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 10 1月, 2011 1 次提交
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由 Alagu Sankar 提交于
This patch adds support for handling SDIO interrupt on DaVinci MMC/SD controller. The patch has been tested on DM355 and DA850 EVMs with Marvell Libertas based SDIO wireless LAN card. Signed-off-by: NAlagu Sankar <alagusankar@embwise.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 09 1月, 2011 23 次提交
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由 Arnd Hannemann 提交于
With current code card insert/eject interrupts will acknowledge outstanding commands. Normally this seems to be no problem, however if the hardware gets stuck and no interrupts for CMD_TIMEOUT or CMD_RESPEND are generated, then inserting and ejecting cards will falsely acknowledge outstanding commands from the core. This patch changes the behavior so that CMDs are only acked, if CMD_TIMEOUT or CMD_RESPEND is received. Signed-off-by: NArnd Hannemann <arnd@arndnet.de> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Arnd Hannemann 提交于
When doing excessive hotplug, e.g., repeated insert/eject operations, the hardware may get confused to a point where no CMDTIMEOUT/CMDRESPEND interrupts are generated any more. As a result requests get stuck, e.g.: [ 360.351562] INFO: task kworker/u:0:5 blocked for more than 120 seconds. [ 360.351562] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message. [ 360.359375] kworker/u:0 D c020c2b4 0 5 2 0x00000000 [ 360.367187] Backtrace: [ 360.367187] [<c020bfb0>] (schedule+0x0/0x340) from [<c020c480>] (schedule_timeout+0x20/0x190) [ 360.375000] r8:c702fd70 r7:00000002 r6:c702e000 r5:c702fdc4 r4:7fffffff [ 360.375000] r3:c701e040 [ 360.382812] [<c020c460>] (schedule_timeout+0x0/0x190) from [<c020be78>] (wait_for_common+0xc4/0x150) [ 360.390625] r6:c702e000 r5:c702fdc4 r4:7fffffff [ 360.390625] [<c020bdb4>] (wait_for_common+0x0/0x150) from [<c020bfac>] (wait_for_completion+0x18/0x1c) [ 360.398437] [<c020bf94>] (wait_for_completion+0x0/0x1c) from [<c0185590>] (mmc_wait_for_req+0x214/0x234) [ 360.406250] [<c018537c>] (mmc_wait_for_req+0x0/0x234) from [<c01889d0>] (mmc_sd_switch+0xfc/0x114) [ 360.414062] r7:c702fe4c r6:c702fe20 r5:c7179800 r4:00fffff0 [ 360.421875] [<c01888d4>] (mmc_sd_switch+0x0/0x114) from [<c0187f70>] (mmc_sd_setup_card+0x260/0x384) [ 360.429687] [<c0187d10>] (mmc_sd_setup_card+0x0/0x384) from [<c01885e0>] (mmc_sd_init_card+0x13c/0x1e0) [ 360.437500] [<c01884a4>] (mmc_sd_init_card+0x0/0x1e0) from [<c01887a8>] (mmc_attach_sd+0x124/0x1a8) [ 360.445312] r8:c02db404 r7:ffffff92 r6:c702ff34 r5:c6007da8 r4:c6007c00 [ 360.453125] [<c0188684>] (mmc_attach_sd+0x0/0x1a8) from [<c0185140>] (mmc_rescan+0x248/0x2f0) [ 360.460937] r5:c6007da8 r4:c6007c00 [ 360.468750] [<c0184ef8>] (mmc_rescan+0x0/0x2f0) from [<c00467f0>] (process_one_work+0x1ec/0x318) [ 360.476562] r7:c6007da8 r6:00000000 r5:c710ec00 r4:c701bde0 [ 360.484375] [<c0046604>] (process_one_work+0x0/0x318) from [<c0047fb0>] (worker_thread+0x1b0/0x2cc) [ 360.492187] [<c0047e00>] (worker_thread+0x0/0x2cc) from [<c004b338>] (kthread+0x8c/0x94) [ 360.500000] [<c004b2ac>] (kthread+0x0/0x94) from [<c0037fc4>] (do_exit+0x0/0x590) [ 360.507812] r7:00000013 r6:c0037fc4 r5:c004b2ac r4:c7021f00 This patch addresses this problem by introducing timeouts for outstanding interrupts. If a hardware interrupt is missing, a soft reset will be performed to bring the hardware back to a working state. Tested with the SDHI hardware block in sh7372 / AP4EVB. Signed-off-by: NArnd Hannemann <arnd@arndnet.de> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Arnd Hannemann 提交于
This patch implements SDIO IRQ support for mfds which announce the TMIO_MMC_SDIO_IRQ flag for tmio_mmc. If MMC_CAP_SDIO_IRQ is also set SDIO IRQ signalling is activated. Tested with a b43-based wireless SDIO card and sh_mobile_sdhi. Signed-off-by: NArnd Hannemann <arnd@arndnet.de> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Arnd Hannemann 提交于
with "mmc: tmio: implement a bounce buffer for unaligned DMA" gcc generates the following warnings: drivers/mmc/host/tmio_mmc.c:654:6: warning: 'ret' may be used uninitialized in this function drivers/mmc/host/tmio_mmc.c:730:6: warning: 'ret' may be used uninitialized in this function This patch fixes these by setting ret to -EINVAL in the affected code paths. Signed-off-by: NArnd Hannemann <arnd@arndnet.de> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Guennadi Liakhovetski 提交于
For example, with SDIO WLAN cards, some transfers happen with buffers at odd addresses, whereas the SH-Mobile DMA engine requires even addresses for SDHI. This patch extends the tmio driver with a bounce buffer, that is used for single entry scatter-gather lists both for sending and receiving. If we ever encounter unaligned transfers with multi-element sg lists, this patch will have to be extended. For now it just falls back to PIO in this and other unsupported cases. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NSamuel Ortiz <sameo@linux.intel.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Guennadi Liakhovetski 提交于
drivers/mmc/host/tmio_mmc.h is only used by drivers/mmc/host/tmio_mmc.c, this needlessly complicates source-code handling. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Guennadi Liakhovetski 提交于
The easiest way to fall back to PIO, when a DMA descriptor allocation fails is to disable DMA on the controller but continue with the current request in PIO mode. This way tmio_mmc_start_dma() can become void, since it cannot be failing any more. The current version is also broken: it is testing a wrong pointer and thus failing to recognise, that a descriptor allocation wasn't successful. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Guennadi Liakhovetski 提交于
The driver is capable of handling multi-element sg lists in both PIO and DMA modes. In DMA mode this also allows to use the DMA sg capability more efficiently and almost doubles the throughput. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Will Newton 提交于
This adds the mmc host driver for the Synopsys DesignWare mmc host controller, found in a number of embedded SoC designs. Signed-off-by: NWill Newton <will.newton@imgtec.com> Reviewed-by: NMatt Fleming <matt@console-pimps.org> Reviewed-by: NChris Ball <cjb@laptop.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Olof Johansson 提交于
SDHCI driver for Tegra. This driver plugs in as a new variant of sdhci-pltfm, using the platform data structure passed in to specify the GPIOs to use for card detect, write protect and card power enablement. Original driver (of which only the header file is left): Signed-off-by: NYvonne Yip <y@palm.com> The rest, which has been rewritten by now: Signed-off-by: NOlof Johansson <olof@lixom.net> Reviewed-by: NWolfram Sang <w.sang@pengutronix.de> Acked-by: NMike Rapoport <mike@compulab.co.il> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Olof Johansson 提交于
Some controllers misparse segment length 0 as being 0, not 65536. Add a quirk to deal with it. Signed-off-by: NOlof Johansson <olof@lixom.net> Reviewed-by: NChris Ball <cjb@laptop.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Jeongbae Seo 提交于
This patch supports controllers with no internal clock divider in SDHCI, such as the s5pc210 board. The external clock divider can be used to make a proper clock because SDHCI doesn't support internal clock divider by itself. If external clock divider type is selected, some functions related to clock control will be overrided by other functions. The current clock control index is added to let you know which clock bus is used for SDHCI when overriding functions. Checking functions are added into sdhci_s3c_consider_clock, because the clock divider step is different from that of host controller. Signed-off-by: NJeongbae Seo <jeongbae.seo@samsung.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Jeongbae Seo 提交于
This patch adds support for additional host capabilities like SD/MMC high speed, SDHCI bus width, etc. Signed-off-by: NJeongbae Seo <jeongbae.seo@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Takashi Iwai 提交于
Signed-off-by: NTakashi Iwai <tiwai@suse.de> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Aries Lee 提交于
Some old MMC devices fail with the 4/8 bits the driver tries to use exclusively. This patch adds a test for the given bus setup and falls back to the lower bit mode (until 1-bit mode) when the test fails. [Major rework and refactoring by tiwai] [Quirk addition and many fixes by prakity] Signed-off-by: NAries Lee <arieslee@jmicron.com> Signed-off-by: NTakashi Iwai <tiwai@suse.de> Signed-off-by: NPhilip Rakity <prakity@marvell.com> Tested-by: NPhilip Rakity <prakity@marvell.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Takashi Iwai 提交于
JMicron 388 SD/MMC combo controller supports the 1.8V low-voltage for SD, but MMC doesn't work with the low-voltage, resulting in an error at probing. This patch adds the support for multiple voltage mask per device type, so that SD works with 1.8V while MMC forces 3.3V. Here new ocr_avail_* fields for each device are introduced, so that the actual OCR mask is switched dynamically. Also, the restriction of low-voltage in core/sd.c is removed when the bit is allowed explicitly via ocr_avail_sd mask. This patch was rewritten from scratch based on Aries' original code. Signed-off-by: NAries Lee <arieslee@jmicron.com> Signed-off-by: NTakashi Iwai <tiwai@suse.de> Reviewed-by: NChris Ball <cjb@laptop.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Joe Perches 提交于
Signed-off-by: NJoe Perches <joe@perches.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Philip Rakity 提交于
More information should be shown when sdhci_dumpregs is called. Knowing the command is useful for debugging, and Capability 1 is useful for SD v3. Signed-off-by: NPhilip Rakity <prakity@marvell.com> Reviewed-by: NChris Ball <cjb@laptop.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Jennifer Li 提交于
This patch disables the broken ADMA on selected O2Micro devices. Signed-off-by: NJennifer Li <Jennifer.li@o2micro.com> Reviewed-by: NChris Ball <cjb@laptop.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Axel Lin 提交于
Remove release_resource() after release_mem_region(). Signed-off-by: NAxel Lin <axel.lin@gmail.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Alberto Panizzo 提交于
This also fixes the build problem introduced by my previous patch due to unhandled API changes introduced by commit: 99fc5131 (mmc: Move regulator handling closer to core) Signed-off-by: NAlberto Panizzo <maramaopercheseimorto@gmail.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Alberto Panizzo 提交于
This implementation is based on the pxamci.c driver and it will be used to support the mx31_3ds machine. Signed-off-by: NAlberto Panizzo <maramaopercheseimorto@gmail.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Mike Rapoport 提交于
Implement an sdhci-pltfm driver for the controller found in the Marvell Dove SoC. Signed-off-by: NMike Rapoport <mike@compulab.co.il> CC: Saeed Bishara <saeed@marvell.com> Acked-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 05 1月, 2011 1 次提交
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由 Guennadi Liakhovetski 提交于
Simplify the driver by removing the possibility to build it without the DMA support and remove the respective Kconfig parameter. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 04 1月, 2011 2 次提交
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由 Rob Herring 提交于
Fixes for sdhci-of and ipmi drivers. Auditing all drivers using of_get_property did not find other occurrences likely to be used on LE platforms. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Rob Herring 提交于
Some OF drivers could likely be used on non-powerpc OF based platforms, so fix the kconfig depends to be CONFIG_OF instead of CONFIG_PPC_OF. Compile tested on ARM and sparc. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 30 12月, 2010 1 次提交
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由 Russell King 提交于
Make the MMCI announcement printk say which primecell part number has been found. Display the revision as an unsigned decimal, and display only the first 8 hex digits of the base address unless it's larger. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 24 12月, 2010 1 次提交
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由 Tejun Heo 提交于
Workqueue creation API has been updated and flush_scheduled_work() is deprecated and scheduled to be removed. * core/core.c: Use alloc_ordered_workqueue() instead of create_singlethread_workqueue(). This removes an unnecessary rescuer. * host/omap.c: Create, use and flush mmc_omap_wq instead of the system_wq. * Flush host->mmc_carddetect_work directly on removal instead of using flush_scheduled_work(). Signed-off-by: NTejun Heo <tj@kernel.org> Cc: Chris Ball <cjb@laptop.org> Cc: linux-mmc@vger.kernel.org
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- 22 12月, 2010 2 次提交
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由 Nicolas Ferre 提交于
Based on report made by Yauhen in: "MMC: Fix multiblock SDIO transfers in AT91 MCI" patch, I report those changes to the brother driver: atmel-mci. So, this patch sets SDIO transfer types: SDIO block and SDIO byte transfers instead of using ordinary MMC block transfers. It is checking opcode for SDIO CMD53 and setting transfer type in MCI_CMDR register properly. Reported-by: NYauhen Kharuzhy <yauhen.kharuzhy@promwad.com> Cc: <stable@kernel.org> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Yauhen Kharuzhy 提交于
The AT91 MCI has special SDIO transfer types: SDIO block and SDIO byte transfers, but at91_mci driver doesn't use them and handles all SDIO transfers as ordinary MMC block transfers. This causes problems for multiple-block SDIO transfers (in particular for 256-bytes blocks). Fix this situation by checking the opcode for SDIO CMD53 and setting the transfer type in the AT91_MCI_CMDR register properly. This patch was tested with libertas SDIO driver: problem with TX timeouts on big packets was eliminated. Signed-off-by: NYauhen Kharuzhy <yauhen.kharuzhy@promwad.com> Cc: <stable@kernel.org> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 21 12月, 2010 5 次提交
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由 Sahitya Tummala 提交于
The current code checks for both DATA_END and DATA_BLK_END bits in MCI_STATUS register and ends a request only if both are set at a time. The hardware doesn't always set DATA_BLK_END when DATA_END is set. But DATA_END status itself is sufficient condition from hardware that data transfer is done and hence, check for only DATA_END interrupt in software to end a request. Signed-off-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org>
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由 Sahitya Tummala 提交于
The current code for PIO doesn't transfer whole data when data size is not in multiple of 4 bytes. The last few bytes are not written to the card resulting in no DATAEND interrupt from SDCC. This patch allows data transfer for non-aligned data size in PIO mode. Signed-off-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org>
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由 Sahitya Tummala 提交于
SDCC uses an asynchronous FIFOs for data synchronization (one for TX and one for RX). For any error when DPSM (Data path state machine) is involved the transfer is terminated with the remaining data stuck inside FIFOs. Reset the controller in case of data errors to ensure that any left over data in FIFOs is flushed out and DPSM is in good state. The following problems are observed without this reset functionality - 1. After the card is removed in an unsafe way (removed when there is an on going data transfer), the card will not be detected upon its next insertion. This is because the controller wouldn't respond to few initialization commands. 2. When an error occurs for a data transfer in non-DMA mode, sometimes we get spurious PIO interrupt after the request is processed. Signed-off-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org>
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由 Sahitya Tummala 提交于
Enable prog done interrupt for stop command(CMD12) that is sent after a multi-block write(CMD25). The PROG_DONE bit is set when the card has finished its programming and is ready for next data. After every write request the card will be polled for ready status using CMD13. For a multi-block write(CMD25) before sending CMD13, stop command (CMD12) will be sent. If we enable prog done interrupt for CMD12, then CMD13 polling can be avoided. The prog done interrupt means that the card is done with its programming and is ready for next request. Signed-off-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org>
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由 Sahitya Tummala 提交于
In the context of request processing thread, data mover lock is acquired after the host lock. In another context, in the completion handler of data mover the locks are acquired in the reverse order, resulting in possible circular lock dependency warning. Hence, schedule a tasklet to process the dma completion so as to avoid nested locks. Signed-off-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org>
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- 20 12月, 2010 2 次提交
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由 Linus Walleij 提交于
I misread the datasheet as if bypass mode was not available at all on the ux500's, I was wrong. It is there, the datasheet just states that you should not have to use it. Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Linus Walleij 提交于
The Ux500 variant of this block has a different divider. The value used right now is too big and which means a loss in performance. This fix corrects it. Also expand the math comments a bit so it's clear what's happening. Further the Ux500 variant does not like if we use the BYPASS bit, instead we are supposed to set the clock divider to zero. Signed-off-by: NUlf Hansson <ulf.hansson@stericsson.com> Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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