1. 28 7月, 2008 1 次提交
    • M
      x86: L3 cache index disable for 2.6.26 · 8cb22bcb
      Mark Langsdorf 提交于
      New versions of AMD processors have support to disable parts
      of their L3 caches if too many MCEs are generated by the
      L3 cache.
      
      This patch provides a /sysfs interface under the cache
      hierarchy to display which caches indices are disabled
      (if any) and to monitoring applications to disable a
      cache index.
      
      This patch does not set an automatic policy to disable
      the L3 cache.  Policy decisions would need to be made
      by a RAS handler.  This patch merely makes it easier to
      see what indices are currently disabled.
      Signed-off-by: NMark Langsdorf <mark.langsdorf@amd.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      8cb22bcb
  2. 22 7月, 2008 39 次提交