- 14 5月, 2012 3 次提交
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由 Ivan Djelic 提交于
Two modes are supported: 4-bit and 8-bit error correction. Note that 4-bit mode is only confirmed to work on OMAP3630 ES 1.x, x >= 1. The OMAP3 GPMC hardware BCH engine computes remainder polynomials, it does not provide automatic error location and correction: this step is implemented using the BCH library. This implementation only protects page data, there is no support for protecting user-defined spare area bytes (this could be added with few modifications); therefore, it cannot be used with YAFFS2 or other similar filesystems that depend on oob storage. Before being stored to nand flash, hardware BCH ecc is adjusted so that an erased page has a valid ecc; thus allowing correction of bitflips in blank pages (also common on 4-bit devices). BCH correction mode is selected at runtime by setting platform data parameter 'ecc_opt' to value OMAP_ECC_BCH4_CODE_HW or OMAP_ECC_BCH8_CODE_HW. This code has been tested with mtd test modules, UBI and UBIFS on a BeagleBoard revC3 (OMAP3530 ES3.0 + Micron NAND 256MiB 1,8V 16-bit). Signed-off-by: NIvan Djelic <ivan.djelic@parrot.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ivan Djelic 提交于
If a context switch occurs in function omap_wait() just before the while loop is entered, then upon return from context switch the timeout may already have elapsed: in that case, status is never read from NAND device, and omap_wait() returns an error. This failure has been experimentally observed during stress tests. This patch ensures a NAND status read is always performed before returning, as in the generic nand_wait() function. Signed-off-by: NIvan Djelic <ivan.djelic@parrot.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Grazvydas Ignotas 提交于
If prefetch engine is busy, current code "forgets" to call dma_unmap_single(), which results in a deadlock later, so add it. Signed-off-by: NGrazvydas Ignotas <notasas@gmail.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 27 3月, 2012 2 次提交
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由 Mike Dunn 提交于
Flash device drivers initialize 'ecc_strength' in struct mtd_info, which is the maximum number of bit errors that can be corrected in one writesize region. Drivers using the nand interface intitialize 'strength' in struct nand_ecc_ctrl, which is the maximum number of bit errors that can be corrected in one ecc step. Nand infrastructure code translates this to 'ecc_strength'. Also for nand drivers, the nand infrastructure code sets ecc.strength for ecc modes NAND_ECC_SOFT, NAND_ECC_SOFT_BCH, and NAND_ECC_NONE. It is set in the driver for all other modes. Signed-off-by: NMike Dunn <mikedunn@newsguy.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Artem Bityutskiy 提交于
The first 3 arguments of 'mtd_device_parse_register()' are pointers, but many callers pass '0' instead of 'NULL'. Fix this globally. Thanks to coccinelle for making it easy to do with the following semantic patch: @@ expression mtd, types, parser_data, parts, nr_parts; @@ ( -mtd_device_parse_register(mtd, 0, parser_data, parts, nr_parts) +mtd_device_parse_register(mtd, NULL, parser_data, parts, nr_parts) | -mtd_device_parse_register(mtd, types, 0, parts, nr_parts) +mtd_device_parse_register(mtd, types, NULL, parts, nr_parts) | -mtd_device_parse_register(mtd, types, parser_data, 0, nr_parts) +mtd_device_parse_register(mtd, types, parser_data, NULL, nr_parts) ) Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 10 1月, 2012 1 次提交
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由 Axel Lin 提交于
This patch converts the drivers in drivers/mtd/* to use the module_platform_driver() macro which makes the code smaller and a bit simpler. Signed-off-by: NAxel Lin <axel.lin@gmail.com> Acked by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 01 11月, 2011 1 次提交
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由 Paul Gortmaker 提交于
We are cleaning up the implicit presence of module.h that these drivers are taking advantage of. Fix them in advance of the cleanup operation. Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
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- 11 9月, 2011 4 次提交
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由 Brian Norris 提交于
Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@intel.com>
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由 Brian Norris 提交于
Start moving away from the MTD_DEBUG_LEVEL messages. The dynamic debugging feature is a generic kernel feature that provides more flexibility. (See Documentation/dynamic-debug-howto.txt) Also fix some punctuation, indentation, and capitalization that went along with the affected lines. Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@intel.com>
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由 Dmitry Eremin-Solenikov 提交于
Replace custom invocations of parse_mtd_partitions and mtd_device_register with common mtd_device_parse_register call. This would bring: standard handling of all errors, fallback to default partitions, etc. Signed-off-by: NDmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
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由 Dmitry Eremin-Solenikov 提交于
Since 'cmdline, NULL' is now a default for parse_mtd_partitions, don't specify this in every driver, instead pass NULL to force parse_mtd_partitions to use default. Signed-off-by: NDmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
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- 25 5月, 2011 3 次提交
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由 Jamie Iles 提交于
Convert to mtd_device_register() and remove the CONFIG_MTD_PARTITIONS preprocessor conditionals as partitioning is always available. Signed-off-by: NJamie Iles <jamie@jamieiles.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Kishore Kadiyala 提交于
When reading/writing a subpage (When HW ECC is not available/enabled) for number of bytes not aligned to 4, the mis-aligned bytes are handled first (by cpu copy method) before enabling the Prefetch engine to/from 'p'(start of buffer 'buf'). Then it reads/writes rest of the bytes with the help of Prefetch engine, if available, or again using cpu copy method. Currently, reading/writing of rest of bytes, is not done correctly since its trying to read/write again to/from begining of buffer 'buf', overwriting the mis-aligned bytes. Read & write using prefetch engine got broken in commit '2c01946c'. We never hit a scenario of not getting 'gpmc_prefetch_enable' call success. So, problem did not get caught up. Signed-off-by: NKishore Kadiyala <kishore.kadiyala@ti.com> Signed-off-by: NVimal Singh <vimal.newwork@gmail.com> Reported-by: NBryan DE FARIA <bdefaria@adeneo-embedded.com> Cc: stable@kernel.org [2.6.35+] Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Jan Weitzel 提交于
nand_scan calls nand_scan_tail and here we got a ecc.layout and calculate oobavail for this layout. After calling nand_scan, we change the layout pointer if OMAP_ECC_HAMMING_CODE_HW_ROMCODE is set. This results in not calcluated oobavail. Mountig as jffs2 is not possible. To fix that nand_scan has to split up in nand_scan_ident and nand_scan_tail setting ecc.layout between these calls. So nand_scan_tail calculates oobvail for the used layout. This is also done in serveral other platforms. Signed-off-by: NJan Weitzel <j.weitzel@phytec.de> Reviewed-by: NVimal Singh <vimal.newwork@gmail.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 11 3月, 2011 2 次提交
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由 John Ogness 提交于
The number of corrected ECC errors should be reported since other MTD systems make use of this information (such as UBI data scrubbing). Signed-off-by: NJohn Ogness <john.ogness@linutronix.de> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Axel Lin 提交于
Since 43cc71ee (platform: prefix MODALIAS with "platform:"), the platform modalias is prefixed with "platform:". Signed-off-by: NAxel Lin <axel.lin@gmail.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com> Cc: stable@kernel.org
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- 18 2月, 2011 6 次提交
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由 Sukumar Ghorai 提交于
This patch overrides nand ecc layout and bad block descriptor (for 8-bit device) to support hw ecc in romcode layout. So as to have in sync with ecc layout throughout; i.e. x-loader, u-boot and kernel. This enables to flash x-loader, u-boot, kernel, FS images from kernel itself and compatiable with other tools. This patch does not enables this feature by default and need to pass from board file to enable for any board. Signed-off-by: NVimal Singh <vimalsingh@ti.com> Signed-off-by: NSukumar Ghorai <s-ghorai@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Sukumar Ghorai 提交于
This patch makes it possible to select sw or hw (different layout options) ecc scheme supported by omap nand driver. Signed-off-by: NVimal Singh <vimalsingh@ti.com> Signed-off-by: NSukumar Ghorai <s-ghorai@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Sukumar Ghorai 提交于
Configure the FIFO THREASHOLD value different for read and write to keep busy both filling and to drain out of FIFO at reading and writing. Signed-off-by: NVimal Singh <vimalsingh@ti.com> Signed-off-by: NSukumar Ghorai <s-ghorai@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Sukumar Ghorai 提交于
This patch enable prefetch-irq mode for nand transfer(read, write) Signed-off-by: NVimal Singh <vimalsingh@ti.com> Signed-off-by: NSukumar Ghorai <s-ghorai@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Sukumar Ghorai 提交于
nand transfer type (sDMA, Polled, prefetch) can be select from board file, enabling all transfer type in driver, by default. this helps in multi-omap build and to select different transfer type for different board. Signed-off-by: NSukumar Ghorai <s-ghorai@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Sukumar Ghorai 提交于
zoom3 and 3630-sdp having the x16 nand device. This patch configure gpmc as x16 and select the currect function in driver for polled mode (without prefetch enable) transfer. Signed-off-by: NSukumar Ghorai <s-ghorai@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 07 12月, 2010 1 次提交
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由 Sukumar Ghorai 提交于
Commit 2c01946c (omap3 nand: cleanup virtual address usages) wrongly enabled CONFIG_MTD_NAND_OMAP_HWECC which breaks boards like beagle and pandora that use software ECC for write. Boards like beagle and pandora uses sw ecc for write (e.g. binary flushed from u-boot) and read from kernel. Signed-off-by: NSukumar Ghorai <s-ghorai@ti.com> Acked-by: NDavid Woodhouse <David.Woodhouse@intel.com> [tony@atomide.com: updated comments] Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 25 10月, 2010 1 次提交
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由 G, Manjunath Kondaiah 提交于
This patch fixes sparse warning for static declaration of variable "use_dma" drivers/mtd/nand/omap2.c:114:11: warning: symbol 'use_dma' was not declared. Should it be static? Signed-off-by: NG, Manjunath Kondaiah <manjugk@ti.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 30 9月, 2010 1 次提交
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由 Daniel J Blueman 提交于
Fix build failure from recent interface change and merge. Tested on OMAP3430. Signed-off-by: NDaniel J Blueman <daniel.blueman@gmail.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 02 8月, 2010 2 次提交
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由 Sukumar Ghorai 提交于
This patch removes direct reference of gpmc address from generic nand platform code. Nand platform code now uses wrapper functions which are implemented in gpmc module. Signed-off-by: NSukumar Ghorai <s-ghorai@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Sukumar Ghorai 提交于
few functions added in gpmc module and to be used by other drivers like NAND. Signed-off-by: NSukumar Ghorai <s-ghorai@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 30 3月, 2010 1 次提交
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由 Tejun Heo 提交于
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: NTejun Heo <tj@kernel.org> Guess-its-ok-by: NChristoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
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- 27 2月, 2010 3 次提交
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由 Vimal Singh 提交于
There is a bug in nand prefetch read routine, which comes into effect only if nand device is a 16-bit device (as we have in zoom boards). This bug is effective only with below combination of conditions: 1. nand deivce, in use, is a 16 bit device 2. nand driver supports 'subpage' read 3. SW ECC is in use This was not seen old kernel (ex: .23), because when, in early days, we tested this (nand prefetch read in LDP boards) there was no 'subpage read' support. Later when we had subpage read in (.27) kernel, we had hw ecc enabled always in our internal tree. So, we missed this bug. This patch fixes the issue. Signed-off-by: NVimal Singh <vimalsingh@ti.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Vimal Singh 提交于
Removing OMAP NAND driver, when loaded as a module, gives error and does not get success. This fixes this and makes driver loadable and removable run time. Signed-off-by: NVimal Singh <vimalsingh@ti.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Vimal Singh 提交于
Fixing below warning in compilation: drivers/mtd/nand/omap2.c: In function 'omap_write_buf_dma_pref': drivers/mtd/nand/omap2.c:508: warning: passing argument 2 of 'omap_nand_dma_transfer' discards qualifiers from pointer target type Signed-off-by: NVimal Singh <vimalsingh@ti.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 16 2月, 2010 1 次提交
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由 Vimal Singh 提交于
Introducing 'gpmc-nand.c' for GPMC specific NAND init. For example: GPMC timing parameters and all. This patch also migrates gpmc related calls from 'nand/omap2.c' to 'gpmc-nand.c'. Signed-off-by: NVimal Singh <vimalsingh@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 21 10月, 2009 1 次提交
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由 Tony Lindgren 提交于
Move the remaining headers under plat-omap/include/mach to plat-omap/include/plat. Also search and replace the files using these headers to include using the right path. This was done with: #!/bin/bash mach_dir_old="arch/arm/plat-omap/include/mach" plat_dir_new="arch/arm/plat-omap/include/plat" headers=$(cd $mach_dir_old && ls *.h) omap_dirs="arch/arm/*omap*/ \ drivers/video/omap \ sound/soc/omap" other_files="drivers/leds/leds-ams-delta.c \ drivers/mfd/menelaus.c \ drivers/mfd/twl4030-core.c \ drivers/mtd/nand/ams-delta.c" for header in $headers; do old="#include <mach\/$header" new="#include <plat\/$header" for dir in $omap_dirs; do find $dir -type f -name \*.[chS] | \ xargs sed -i "s/$old/$new/" done find drivers/ -type f -name \*omap*.[chS] | \ xargs sed -i "s/$old/$new/" for file in $other_files; do sed -i "s/$old/$new/" $file done done for header in $(ls $mach_dir_old/*.h); do git mv $header $plat_dir_new/ done Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 20 9月, 2009 2 次提交
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由 vimal singh 提交于
This patch adds DMA mode support for nand prefetch/post-write engine. Signed-off-by: NVimal Singh <vimalsingh@ti.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 vimal singh 提交于
This patch adds prefetch support to access nand flash in mpu mode. This patch also adds 8-bit nand support (omap_read/write_buf8). Prefetch can be used for both 8- and 16-bit devices. Signed-off-by: NVimal Singh <vimalsingh@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 28 6月, 2009 1 次提交
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由 vimal singh 提交于
We need to include jiffies.h manually in some cases, and the status returned from omap_wait() was broken in two separate ways. Also add cond_resched() to the loop. Signed-off-by: NVimal Singh <vimalsingh@ti.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 06 6月, 2009 1 次提交
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由 Vimal Singh 提交于
This driver is present in the OMAP tree, now pushing it to MTD. Original author(s): Jian Zhang <jzhang@ti.com> Signed-off-by: NVimal Singh <vimalsingh@ti.com> Cc: Jian Zhang <jzhang@ti.com> Cc: Artem Bityutskiy <dedekind@infradead.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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