1. 18 2月, 2010 1 次提交
  2. 01 6月, 2009 1 次提交
    • P
      sh: Tidy up SH-4A boot_cpu_data.flags probing. · 0bf8513e
      Paul Mundt 提交于
      This tidies up the boot_cpu_data.flags probing on SH-4A. All of them have
      a few things in common, which we can blindly set, rather than having each
      subtype have to set the same flags. We can also make assumptions about
      cache ways and the validity of PTEA, so this also kills off CPU_HAS_PTEA
      as a config option. There was also a bug in the FPU probing, which is now
      tidied up.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      0bf8513e
  3. 08 5月, 2009 1 次提交
    • P
      sh: Always fixup unaligned userspace accesses on sh64. · c29418c2
      Paul Mundt 提交于
      sh64 has traditionally had this configurable via a Kconfig option
      (CONFIG_SH64_USER_MISALIGNED_FIXUP). In practice it has never really been
      terribly useful to turn this off, so just get rid of the option entirely.
      
      We leave the sysctl around so we don't end up breaking existing root
      file systems, and to allow folks that really want this off to do so at
      their own risk.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      c29418c2
  4. 17 3月, 2009 1 次提交
    • P
      sh: Support for extended ASIDs on PTEAEX-capable SH-X3 cores. · 8263a67e
      Paul Mundt 提交于
      This adds support for extended ASIDs (up to 16-bits) on newer SH-X3 cores
      that implement the PTAEX register and respective functionality. Presently
      only the 65nm SH7786 (90nm only supports legacy 8-bit ASIDs).
      
      The main change is in how the PTE is written out when loading the entry
      in to the TLB, as well as in how the TLB entry is selectively flushed.
      
      While SH-X2 extended mode splits out the memory-mapped U and I-TLB data
      arrays for extra bits, extended ASID mode splits out the address arrays.
      While we don't use the memory-mapped data array access, the address
      array accesses are necessary for selective TLB flushes, so these are
      implemented newly and replace the generic SH-4 implementation.
      
      With this, TLB flushes in switch_mm() are almost non-existent on newer
      parts.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      8263a67e
  5. 14 2月, 2008 2 次提交
  6. 28 1月, 2008 3 次提交