1. 26 3月, 2013 2 次提交
    • W
      ARM: mm: fix numerous hideous errors in proc-arm740.S · 3ef52f2a
      Will Deacon 提交于
      The setup code in proc-arm740.S is completely broken and, as far as I
      can tell, always has been. I was >this< close to ripping it out, when a
      740t core-tile materialised in the office, so I've had a crack at fixing
      things up:
      
      	- Fix the ram/flash area calculations so that we actually set
      	  the condition flags before testing them...
      	- Fix the proc_info structure so that __cpu_io_mmu_flags are
      	  defined as 0, placing the __cpu_flush pointer at the correct
      	  offset
      	- Re-number the registers used during __arm740_setup so that
      	  we don't clobber the machine ID et al
      	- Advertise Thumb support via the hwcaps, since 740T is the only
      	  740 implementation.
      Acked-by: NHyok S. Choi <hyok.choi@samsung.com>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      3ef52f2a
    • W
      ARM: cache: remove ARMv3 support code · 82d9b0d0
      Will Deacon 提交于
      This is only used by 740t, which is a v4 core and (by my reading of the
      datasheet for the CPU) ignores CRm for the cp15 cache flush operation,
      making the v4 cache implementation in cache-v4.S sufficient for this
      CPU.
      
      Tested with 740T core-tile on Integrator/AP baseboard.
      Acked-by: NHyok S. Choi <hyok.choi@samsung.com>
      Acked-by: NGreg Ungerer <gerg@uclinux.org>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      82d9b0d0
  2. 06 12月, 2011 1 次提交
  3. 07 7月, 2011 1 次提交
  4. 23 2月, 2011 1 次提交
  5. 08 10月, 2010 1 次提交
  6. 27 7月, 2010 1 次提交
    • R
      ARM: Factor out common code from cpu_proc_fin() · 9ca03a21
      Russell King 提交于
      All implementations of cpu_proc_fin() start by disabling interrupts
      and then flush caches.  Rather than have every processors proc_fin()
      implementation do this, move it out into generic code - and move the
      cache flush past setup_mm_for_reboot() (so it can benefit from having
      caches still enabled.)
      
      This allows cpu_proc_fin() to become independent of the L1/L2 cache
      types, and eventually move the L2 cache flushing into the L2 support
      code.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      9ca03a21
  7. 03 10月, 2009 1 次提交
  8. 01 10月, 2008 1 次提交
  9. 24 4月, 2008 1 次提交
  10. 30 11月, 2006 1 次提交
  11. 28 9月, 2006 1 次提交