1. 29 6月, 2017 1 次提交
  2. 20 4月, 2017 1 次提交
  3. 19 4月, 2017 2 次提交
  4. 23 9月, 2016 1 次提交
  5. 08 3月, 2016 1 次提交
  6. 17 2月, 2016 1 次提交
  7. 08 6月, 2015 1 次提交
  8. 06 5月, 2015 1 次提交
  9. 24 4月, 2015 1 次提交
    • J
      irq_remapping: Clean up unused MSI related code · 7a53a121
      Jiang Liu 提交于
      Now MSI interrupt has been converted to new hierarchical irqdomain
      interfaces, so remove legacy MSI related code and interfaces.
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: David Cohen <david.a.cohen@linux.intel.com>
      Cc: Sander Eikelenboom <linux@eikelenboom.it>
      Cc: David Vrabel <david.vrabel@citrix.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: iommu@lists.linux-foundation.org
      Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
      Cc: Joerg Roedel <jroedel@suse.de>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Dimitri Sivanich <sivanich@sgi.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Yijing Wang <wangyijing@huawei.com>
      Link: http://lkml.kernel.org/r/1428905519-23704-18-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      7a53a121
  10. 16 12月, 2014 1 次提交
  11. 28 5月, 2014 1 次提交
  12. 04 2月, 2014 3 次提交
  13. 08 1月, 2014 1 次提交
    • Y
      PCI: Enforce bus address limits in resource allocation · f75b99d5
      Yinghai Lu 提交于
      When allocating space for 32-bit BARs, we previously limited RESOURCE
      addresses so they would fit in 32 bits.  However, the BUS address need not
      be the same as the resource address, and it's the bus address that must fit
      in the 32-bit BAR.
      
      This patch adds:
      
        - pci_clip_resource_to_region(), which clips a resource so it contains
          only the range that maps to the specified bus address region, e.g., to
          clip a resource to 32-bit bus addresses, and
      
        - pci_bus_alloc_from_region(), which allocates space for a resource from
          the specified bus address region,
      
      and changes pci_bus_alloc_resource() to allocate space for 64-bit BARs from
      the entire bus address region, and space for 32-bit BARs from only the bus
      address region below 4GB.
      
      If we had this window:
      
        pci_root HWP0002:0a: host bridge window [mem 0xf0180000000-0xf01fedfffff] (bus address [0x80000000-0xfedfffff])
      
      we previously could not put a 32-bit BAR there, because the CPU addresses
      don't fit in 32 bits.  This patch fixes this, so we can use this space for
      32-bit BARs.
      
      It's also possible (though unlikely) to have resources with 32-bit CPU
      addresses but bus addresses above 4GB.  In this case the previous code
      would allocate space that a 32-bit BAR could not map.
      
      Remove PCIBIOS_MAX_MEM_32, which is no longer used.
      
      [bhelgaas: reworked starting from http://lkml.kernel.org/r/1386658484-15774-3-git-send-email-yinghai@kernel.org]
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      f75b99d5
  14. 13 12月, 2013 1 次提交
  15. 15 11月, 2013 1 次提交
    • R
      ACPI / driver core: Store an ACPI device pointer in struct acpi_dev_node · 7b199811
      Rafael J. Wysocki 提交于
      Modify struct acpi_dev_node to contain a pointer to struct acpi_device
      associated with the given device object (that is, its ACPI companion
      device) instead of an ACPI handle corresponding to it.  Introduce two
      new macros for manipulating that pointer in a CONFIG_ACPI-safe way,
      ACPI_COMPANION() and ACPI_COMPANION_SET(), and rework the
      ACPI_HANDLE() macro to take the above changes into account.
      Drop the ACPI_HANDLE_SET() macro entirely and rework its users to
      use ACPI_COMPANION_SET() instead.  For some of them who used to
      pass the result of acpi_get_child() directly to ACPI_HANDLE_SET()
      introduce a helper routine acpi_preset_companion() doing an
      equivalent thing.
      
      The main motivation for doing this is that there are things
      represented by struct acpi_device objects that don't have valid
      ACPI handles (so called fixed ACPI hardware features, such as
      power and sleep buttons) and we would like to create platform
      device objects for them and "glue" them to their ACPI companions
      in the usual way (which currently is impossible due to the
      lack of valid ACPI handles).  However, there are more reasons
      why it may be useful.
      
      First, struct acpi_device pointers allow of much better type checking
      than void pointers which are ACPI handles, so it should be more
      difficult to write buggy code using modified struct acpi_dev_node
      and the new macros.  Second, the change should help to reduce (over
      time) the number of places in which the result of ACPI_HANDLE() is
      passed to acpi_bus_get_device() in order to obtain a pointer to the
      struct acpi_device associated with the given "physical" device,
      because now that pointer is returned by ACPI_COMPANION() directly.
      Finally, the change should make it easier to write generic code that
      will build both for CONFIG_ACPI set and unset without adding explicit
      compiler directives to it.
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com> # on Haswell
      Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com>
      Reviewed-by: Aaron Lu <aaron.lu@intel.com> # for ATA and SDIO part
      7b199811
  16. 12 8月, 2013 1 次提交
    • T
      PCI: use weak functions for MSI arch-specific functions · 4287d824
      Thomas Petazzoni 提交于
      Until now, the MSI architecture-specific functions could be overloaded
      using a fairly complex set of #define and compile-time
      conditionals. In order to prepare for the introduction of the msi_chip
      infrastructure, it is desirable to switch all those functions to use
      the 'weak' mechanism. This commit converts all the architectures that
      were overidding those MSI functions to use the new strategy.
      
      Note that we keep two separate, non-weak, functions
      default_teardown_msi_irqs() and default_restore_msi_irqs() for the
      default behavior of the arch_teardown_msi_irqs() and
      arch_restore_msi_irqs(), as the default behavior is needed by x86 PCI
      code.
      Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Acked-by: NBjorn Helgaas <bhelgaas@google.com>
      Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Tested-by: NDaniel Price <daniel.price@gmail.com>
      Tested-by: NThierry Reding <thierry.reding@gmail.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: linuxppc-dev@lists.ozlabs.org
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: linux390@de.ibm.com
      Cc: linux-s390@vger.kernel.org
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: H. Peter Anvin <hpa@zytor.com>
      Cc: x86@kernel.org
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Fenghua Yu <fenghua.yu@intel.com>
      Cc: linux-ia64@vger.kernel.org
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: David S. Miller <davem@davemloft.net>
      Cc: sparclinux@vger.kernel.org
      Cc: Chris Metcalf <cmetcalf@tilera.com>
      Signed-off-by: NJason Cooper <jason@lakedaemon.net>
      4287d824
  17. 28 1月, 2013 1 次提交
  18. 14 1月, 2013 1 次提交
    • R
      ACPI / PCI: Set root bridge ACPI handle in advance · 6c0cc950
      Rafael J. Wysocki 提交于
      The ACPI handles of PCI root bridges need to be known to
      acpi_bind_one(), so that it can create the appropriate
      "firmware_node" and "physical_node" files for them, but currently
      the way it gets to know those handles is not exactly straightforward
      (to put it lightly).
      
      This is how it works, roughly:
      
        1. acpi_bus_scan() finds the handle of a PCI root bridge,
           creates a struct acpi_device object for it and passes that
           object to acpi_pci_root_add().
      
        2. acpi_pci_root_add() creates a struct acpi_pci_root object,
           populates its "device" field with its argument's address
           (device->handle is the ACPI handle found in step 1).
      
        3. The struct acpi_pci_root object created in step 2 is passed
           to pci_acpi_scan_root() and used to get resources that are
           passed to pci_create_root_bus().
      
        4. pci_create_root_bus() creates a struct pci_host_bridge object
           and passes its "dev" member to device_register().
      
        5. platform_notify(), which for systems with ACPI is set to
           acpi_platform_notify(), is called.
      
      So far, so good.  Now it starts to be "interesting".
      
        6. acpi_find_bridge_device() is used to find the ACPI handle of
           the given device (which is the PCI root bridge) and executes
           acpi_pci_find_root_bridge(), among other things, for the
           given device object.
      
        7. acpi_pci_find_root_bridge() uses the name (sic!) of the given
           device object to extract the segment and bus numbers of the PCI
           root bridge and passes them to acpi_get_pci_rootbridge_handle().
      
        8. acpi_get_pci_rootbridge_handle() browses the list of ACPI PCI
           root bridges and finds the one that matches the given segment
           and bus numbers.  Its handle is then used to initialize the
           ACPI handle of the PCI root bridge's device object by
           acpi_bind_one().  However, this is *exactly* the ACPI handle we
           started with in step 1.
      
      Needless to say, this is quite embarassing, but it may be avoided
      thanks to commit f3fd0c8a (ACPI: Allow ACPI handles of devices to be
      initialized in advance), which makes it possible to initialize the
      ACPI handle of a device before passing it to device_register().
      
      Accordingly, add a new __weak routine, pcibios_root_bridge_prepare(),
      defaulting to an empty implementation that can be replaced by the
      interested architecutres (x86 and ia64 at the moment) with functions
      that will set the root bridge's ACPI handle before its dev member is
      passed to device_register().  Make both x86 and ia64 provide such
      implementations of pcibios_root_bridge_prepare() and remove
      acpi_pci_find_root_bridge() and acpi_get_pci_rootbridge_handle() that
      aren't necessary any more.
      
      Included is a fix for breakage on systems with non-ACPI PCI host
      bridges from Bjorn Helgaas.
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      6c0cc950
  19. 06 12月, 2012 1 次提交
  20. 03 10月, 2012 1 次提交
  21. 07 1月, 2012 1 次提交
  22. 11 5月, 2011 1 次提交
  23. 18 11月, 2010 1 次提交
    • M
      x86: Add NX protection for kernel data · 5bd5a452
      Matthieu Castet 提交于
      This patch expands functionality of CONFIG_DEBUG_RODATA to set main
      (static) kernel data area as NX.
      
      The following steps are taken to achieve this:
      
       1. Linker script is adjusted so .text always starts and ends on a page bound
       2. Linker script is adjusted so .rodata always start and end on a page boundary
       3. NX is set for all pages from _etext through _end in mark_rodata_ro.
       4. free_init_pages() sets released memory NX in arch/x86/mm/init.c
       5. bios rom is set to x when pcibios is used.
      
      The results of patch application may be observed in the diff of kernel page
      table dumps:
      
      pcibios:
      
       -- data_nx_pt_before.txt       2009-10-13 07:48:59.000000000 -0400
       ++ data_nx_pt_after.txt        2009-10-13 07:26:46.000000000 -0400
        0x00000000-0xc0000000           3G                           pmd
        ---[ Kernel Mapping ]---
       -0xc0000000-0xc0100000           1M     RW             GLB x  pte
       +0xc0000000-0xc00a0000         640K     RW             GLB NX pte
       +0xc00a0000-0xc0100000         384K     RW             GLB x  pte
       -0xc0100000-0xc03d7000        2908K     ro             GLB x  pte
       +0xc0100000-0xc0318000        2144K     ro             GLB x  pte
       +0xc0318000-0xc03d7000         764K     ro             GLB NX pte
       -0xc03d7000-0xc0600000        2212K     RW             GLB x  pte
       +0xc03d7000-0xc0600000        2212K     RW             GLB NX pte
        0xc0600000-0xf7a00000         884M     RW         PSE GLB NX pmd
        0xf7a00000-0xf7bfe000        2040K     RW             GLB NX pte
        0xf7bfe000-0xf7c00000           8K                           pte
      
      No pcibios:
      
       -- data_nx_pt_before.txt       2009-10-13 07:48:59.000000000 -0400
       ++ data_nx_pt_after.txt        2009-10-13 07:26:46.000000000 -0400
        0x00000000-0xc0000000           3G                           pmd
        ---[ Kernel Mapping ]---
       -0xc0000000-0xc0100000           1M     RW             GLB x  pte
       +0xc0000000-0xc0100000           1M     RW             GLB NX pte
       -0xc0100000-0xc03d7000        2908K     ro             GLB x  pte
       +0xc0100000-0xc0318000        2144K     ro             GLB x  pte
       +0xc0318000-0xc03d7000         764K     ro             GLB NX pte
       -0xc03d7000-0xc0600000        2212K     RW             GLB x  pte
       +0xc03d7000-0xc0600000        2212K     RW             GLB NX pte
        0xc0600000-0xf7a00000         884M     RW         PSE GLB NX pmd
        0xf7a00000-0xf7bfe000        2040K     RW             GLB NX pte
        0xf7bfe000-0xf7c00000           8K                           pte
      
      The patch has been originally developed for Linux 2.6.34-rc2 x86 by
      Siarhei Liakh <sliakh.lkml@gmail.com> and Xuxian Jiang <jiang@cs.ncsu.edu>.
      
       -v1:  initial patch for 2.6.30
       -v2:  patch for 2.6.31-rc7
       -v3:  moved all code into arch/x86, adjusted credits
       -v4:  fixed ifdef, removed credits from CREDITS
       -v5:  fixed an address calculation bug in mark_nxdata_nx()
       -v6:  added acked-by and PT dump diff to commit log
       -v7:  minor adjustments for -tip
       -v8:  rework with the merge of "Set first MB as RW+NX"
      Signed-off-by: NSiarhei Liakh <sliakh.lkml@gmail.com>
      Signed-off-by: NXuxian Jiang <jiang@cs.ncsu.edu>
      Signed-off-by: NMatthieu CASTET <castet.matthieu@free.fr>
      Cc: Arjan van de Ven <arjan@infradead.org>
      Cc: James Morris <jmorris@namei.org>
      Cc: Andi Kleen <ak@muc.de>
      Cc: Rusty Russell <rusty@rustcorp.com.au>
      Cc: Stephen Rothwell <sfr@canb.auug.org.au>
      Cc: Dave Jones <davej@redhat.com>
      Cc: Kees Cook <kees.cook@canonical.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      LKML-Reference: <4CE2F82E.60601@free.fr>
      [ minor cleanliness edits ]
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      5bd5a452
  24. 18 10月, 2010 1 次提交
  25. 18 8月, 2010 1 次提交
  26. 13 3月, 2010 2 次提交
  27. 20 2月, 2010 1 次提交
    • T
      x86: Move pci init function to x86_init · b72d0db9
      Thomas Gleixner 提交于
      The PCI initialization in pci_subsys_init() is a mess. pci_numaq_init,
      pci_acpi_init, pci_visws_init and pci_legacy_init are called and each
      implementation checks and eventually modifies the global variable
      pcibios_scanned.
      
      x86_init functions allow us to do this more elegant. The pci.init
      function pointer is preset to pci_legacy_init. numaq, acpi and visws
      can modify the pointer in their early setup functions. The functions
      return 0 when they did the full initialization including bus scan. A
      non zero return value indicates that pci_legacy_init needs to be
      called either because the selected function failed or wants the
      generic bus scan in pci_legacy_init to happen (e.g. visws).
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80CFE@orsmsx508.amr.corp.intel.com>
      Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: NJacob Pan <jacob.jun.pan@intel.com>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      b72d0db9
  28. 11 2月, 2010 1 次提交
  29. 18 9月, 2009 1 次提交
  30. 10 9月, 2009 1 次提交
  31. 02 7月, 2009 1 次提交
  32. 12 6月, 2009 1 次提交
  33. 03 4月, 2009 1 次提交
    • J
      x86/dma: unify definition of pci_unmap_addr* and pci_unmap_len macros · 67796bf7
      Joerg Roedel 提交于
      Impact: unification of pci-dma macros and pci_32.h removal
      
      This patch unifies the definition of the pci_unmap_addr*, pci_unmap_len*
      and DECLARE_PCI_UNMAP* macros. This makes sense because the pci_unmap
      functions are no longer no-ops anymore when the kernel runs with
      CONFIG_DMA_API_DEBUG. Without an iommu or DMA_API_DEBUG it is a no-op on 32 bit
      because the dma mapping path returns a physical address and therefore the
      dma-api implementation has no internal state which needs to be destroyed with
      an unmap call.
      This unification also simplifies the port of x86_64 iommu drivers to 32 bit x86
      and let us get rid of pci_32.h.
      Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
      Acked-by: NStephen Hemminger <shemminger@vyatta.com>
      67796bf7
  34. 20 3月, 2009 1 次提交
    • M
      PCI/MSI: Use #ifdefs instead of weak functions · 11df1f05
      Michael Ellerman 提交于
      Weak functions aren't all they're cracked up to be. They lead to
      incorrect binaries with some toolchains, they require us to have empty
      functions we otherwise wouldn't, and the unused code is not elided
      (as of gcc 4.3.2 anyway).
      
      So replace the weak MSI arch hooks with the #define foo foo idiom. We no
      longer need empty versions of arch_setup/teardown_msi_irq().
      
      This is less source (by 1 line!), and results in smaller binaries too:
      
         text	   data	    bss	    dec	    hex	filename
      9354300	1693916	 678424	11726640 b2ef30	build/powerpc/vmlinux-before
      9354052	1693852	 678424	11726328 b2edf8	build/powerpc/vmlinux-after
      
      Also smaller on x86_64 and arm (iop13xx).
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      11df1f05
  35. 13 3月, 2009 1 次提交
  36. 26 12月, 2008 1 次提交