- 14 5月, 2016 1 次提交
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由 Rex Zhu 提交于
It's generic and used by multiple asics. Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 12 5月, 2016 1 次提交
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由 Christian König 提交于
This is the result of running the following commands: find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/[ \t]\+$//' {} \; find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/[ \t]\+$//' {} \; find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/ \+\t/\t/' {} \; find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/ \+\t/\t/' {} \; v2: drop changes to DAL and internal headers Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 05 5月, 2016 4 次提交
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由 Eric Huang 提交于
This fixes a bug in the pptable access interface that could lead to a crash. Check the pointer before using it. Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NEric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Eric Huang 提交于
Allows you to force multiple levels rather than just one via the new sysfs interrface. v2: squash in: drm/amd/powerplay: ensure clock level set by user is valid. From Rex. Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NEric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Eric Huang 提交于
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NEric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Nils Wallménius 提交于
Also adjust phm_construct_table to take a const pointer Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NNils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 11 2月, 2016 3 次提交
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由 Rex Zhu 提交于
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
amd_pp_dal_clock_info to amd_pp_simple_clock_info. Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Eric Huang 提交于
The new sysfs interfaces: pp_num_states: Read-only, return the number of all pp states, 0 if powerplay is not available. pp_cur_state: Read-only, return the index number of current pp state. pp_force_state: Read-write, to write a power state index will switch to selected state forcedly and enable forced state mode, disable forced state mode. such as "echo >...". pp_table: Read-write, binary output, to be used to read or write the dpm table, the maximum file size is 4KB of page size. pp_dpm_sclk: Read-write, reading will return a dpm levels list, to write an index number will force powerplay to set the corresponding dpm level. pp_dpm_mclk: same as sclk. pp_dpm_pcie: same as sclk. And add new setting "manual" to the existing interface power_dpm_force_performance_level. Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NEric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 09 1月, 2016 1 次提交
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由 Rex Zhu 提交于
v2: AGD: rebase on upstream Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 22 12月, 2015 13 次提交
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由 Eric Yang 提交于
Add required structures for amd_powerplay_display_configuration_change Signed-off-by: NEric Yang <eric.yang2@amd.com>
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由 Vitaly Prosyak 提交于
Simplify data struct for get dal power level Signed-off-by: NVitaly Prosyak <vitaly.prosyak@amd.com>
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由 Vitaly Prosyak 提交于
Implement get dal power level and simple clock info Signed-off-by: NVitaly Prosyak <vitaly.prosyak@amd.com>
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由 Rex Zhu 提交于
v2: agd: rebase on upstream Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NRex Zhu <Rex.Zhu@amd.com>
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由 Rex Zhu 提交于
1. for set_cpu_power_state 2. restore display configuration Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com>
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由 Alex Deucher 提交于
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
Interface between hwmgr and eventmgr. Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com>
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由 Rex Zhu 提交于
Add the interface for fan and thermal control. Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
Add callbacks interface for clock and powergating. Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
Displaygap support is required for proper mclk switching. Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 yanyang1 提交于
This implements DPM for tonga. DPM handles dynamic clock and voltage scaling. v2: merge all the patches related with tonga dpm v3: merge dpm force level fix, cgs display fix, spelling fix Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Nyanyang1 <young.yang@amd.com> Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Signed-off-by: NEric Huang <JinHuiEric.Huang@amd.com>
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由 Rex Zhu 提交于
This adds clock and powergating support for CZ. v2: squash in fixes Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Jammy Zhou 提交于
The hwmgr handles all hardware related calls, including clock/power gating control, DPM, read and parse PPTable, etc. v5: squash in fixes v4: implement acpi's atcs function use cgs interface v3: fix code style error and add big-endian mode support. v2: use cgs interface directly in hwmgr sub-module Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Signed-off-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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