By the time request_region is called in the Intel ICH series GPIO
driver, a corresponding device structure has already been allocated. The
devm_request_region function should be used to help simplify the cleanup
code and reduce the possible points of failure.

Cc: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: NWilliam Breathitt Gray <vilhelm.gray@gmail.com>
Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

For completion, sweep the floor from all gpiochip_add() usage so
we can remove that function and get rid of the function wrapper
gpiochip_add().
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The name .dev in a struct is normally reserved for a struct device
that is let us say a superclass to the thing described by the struct.
struct gpio_chip stands out by confusingly using a struct device *dev
to point to the parent device (such as a platform_device) that
represents the hardware. As we want to give gpio_chip:s real devices,
this is not working. We need to rename this member to parent.

This was done by two coccinelle scripts, I guess it is possible to
combine them into one, but I don't know such stuff. They look like
this:

@@
struct gpio_chip *var;
@@
-var->dev
+var->parent

and:

@@
struct gpio_chip var;
@@
-var.dev
+var.parent

and:

@@
struct bgpio_chip *var;
@@
-var->gc.dev
+var->gc.parent

Plus a few instances of bgpio that I couldn't figure out how
to teach Coccinelle to rewrite.

This patch hits all over the place, but I *strongly* prefer this
solution to any piecemal approaches that just exercise patch
mechanics all over the place. It mainly hits drivers/gpio and
drivers/pinctrl which is my own backyard anyway.

Cc: Haavard Skinnemoen <hskinnemoen@gmail.com>
Cc: Rafał Miłecki <zajec5@gmail.com>
Cc: Richard Purdie <rpurdie@rpsys.net>
Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Cc: Alek Du <alek.du@intel.com>
Cc: Jaroslav Kysela <perex@perex.cz>
Cc: Takashi Iwai <tiwai@suse.com>
Acked-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>
Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: NLee Jones <lee.jones@linaro.org>
Acked-by: NJiri Kosina <jkosina@suse.cz>
Acked-by: NHans-Christian Egtvedt <egtvedt@samfundet.no>
Acked-by: NJacek Anaszewski <j.anaszewski@samsung.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Allow the kernel to query the driver for a GPIO's pin direction.
Signed-off-by: NAaron Sierra <asierra@xes-inc.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

A platform_driver does not need to set an owner, it will be populated by the
driver core.
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Signed-off-by: Nabdoulaye berthe <berthe.ab@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch fixes kernel NULL pointer BUG introduced by the following commit:
b667cf48
gpio: ich: Add support for multiple register addresses.
Signed-off-by: NVincent Donnefort <vdonnefort@gmail.com>
Tested-by: NEric Paris <eparis@redhat.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch adds support for Atom C2000 series (Avoton and Rangeley). And has
the following options:
  - New addresses register.
  - Caching output levels (see Intel external design spec, table 48-29)
  - No hardware blink.
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NVincent Donnefort <vdonnefort@gmail.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

This patch allows GPIO driver to cache GPIO_LVL output registers. The aim is to
support chipsets on which GPIO_LVL value can't be read for output pins.

Caching output levels implies the first output values reading as 0. The driver
so can't be aware of set values GPIOs by bootloader or BIOS.
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NVincent Donnefort <vdonnefort@gmail.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

This patch introduces regs and reglen pointers which allow a chipset to have
register addresses differing from ICH ones.
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NVincent Donnefort <vdonnefort@gmail.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

This patch allows gpio_ich driver to be aware of non blink capable chipsets.
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NVincent Donnefort <vdonnefort@gmail.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

This patch allows GPIO driver to cache GPIO_LVL output registers. The aim is to
support chipsets on which GPIO_LVL value can't be read for output pins.

Caching output levels implies the first output values reading as 0. The driver
so can't be aware of set values GPIOs by bootloader or BIOS.
Signed-off-by: NVincent Donnefort <vdonnefort@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch introduces regs and reglen pointers which allow a chipset to have
register addresses differing from ICH ones.
Signed-off-by: NVincent Donnefort <vdonnefort@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch allows gpio_ich driver to be aware of non blink capable chipsets.
Signed-off-by: NVincent Donnefort <vdonnefort@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This switches the two members of struct gpio_chip that were
defined as unsigned foo:1 to bool, because that is indeed what
they are. Switch all users in the gpio and pinctrl subsystems
to assign these values with true/false instead of 0/1. The
users outside these subsystems will survive since true/false
is 1/0, atleast we set some kind of more strict typing example.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Use the wrapper function for retrieving the platform data instead of
accessing dev->platform_data directly.
Signed-off-by: NJingoo Han <jg1.han@samsung.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch makes sure blink hardware is disabled for selected GPIO. Blink
hardware is controled by GPO_BLINK register and is available for GPIOs from 0
to 31.
Signed-off-by: NVincent Donnefort <vdonnefort@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

It is more readable for humans to use double-bang (!!) to convert the value
to pure boolean before it is returned.
Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Stop checking for pin availability in direction and get functions.
These functions can be called repeatedly, so checking every time is
bad for performance. Now that requesting GPIO pins is no longer
optional, checking for availability at pin request time is enough.
Signed-off-by: NJean Delvare <khali@linux-fr.org>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Per Documentation/gpio.txt, gpio_request callbacks should return 0 on
success or a negative value on error. So it is not clear what was
meant by letting ichx_gpio_request return 1 in some cases, nor how a
caller would interpret it.

Align the code with the comment above it and consider pins as
available by default.
Signed-off-by: NJean Delvare <khali@linux-fr.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Acked-by: NPeter Tyser <ptyser@xes-inc.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

ichx_gpio_check_available() returns either 0 or -ENXIO depending on whether
the given GPIO is available or not. However, callers of this function treat
the return value as boolean:

	...
	if (!ichx_gpio_check_available(gpio, nr))
		return -ENXIO;

which erroneusly fails when the GPIO is available and not vice versa.

Fix this by making the function return boolean as expected by the callers.
Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

As reported by CONFIG_DEBUG_SPINLOCK=y.
Signed-off-by: NJean Delvare <khali@linux-fr.org>
Acked-by: NPeter Tyser <ptyser@xes-inc.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

CONFIG_HOTPLUG is going away as an option so __devexit is no
longer needed.
Signed-off-by: NBill Pemberton <wfp5p@virginia.edu>
Cc: Grant Likely <grant.likely@secretlab.ca>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Cc: Peter Tyser <ptyser@xes-inc.com>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

CONFIG_HOTPLUG is going away as an option so __devinit is no longer
needed.
Signed-off-by: NBill Pemberton <wfp5p@virginia.edu>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

CONFIG_HOTPLUG is going away as an option so __devexit_p is no longer
needed.
Signed-off-by: NBill Pemberton <wfp5p@virginia.edu>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Peter Tyser <ptyser@xes-inc.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The ICH chips have their GPIO pins organized in 2 or 3 independent
groups of 32 GPIO pins. It can happen that the ACPI BIOS wants to make
use of pins in one group, preventing the OS to access these. This does
not prevent the OS from accessing the other group(s).

This is the case for example on my Asus Z8NA-D6 board. The ACPI BIOS
wants to control GPIO 18 (group 1), while I (the OS) need to control
GPIO 52 and 53 (group 2) for SMBus multiplexing.

So instead of checking for ACPI resource conflict on the whole I/O
range, check on a per-group basis, and consider it a success if at
least one of the groups is available for the OS to use.
Signed-off-by: NJean Delvare <khali@linux-fr.org>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Aaron Sierra <asierra@xes-inc.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

This driver works on many Intel chipsets, including the ICH6, ICH7,
ICH8, ICH9, ICH10, 3100, Series 5/3400 (Ibex Peak), Series 6/C200
(Cougar Point), and NM10 (Tiger Point).

Additional Intel chipsets should be easily supported if needed, eg the
ICH1-5, EP80579, etc.

Tested on QM67 (Cougar Point), QM57 (Ibex Peak), 3100 (Whitmore Lake),
and NM10 (Tiger Point).

Includes work from Jean Delvare:
        - Resource leak removal during module load/unload
        - GPIO API bit value enforcement

Also includes code cleanup from Guenter Roeck and Grant Likely.
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Signed-off-by: NAaron Sierra <asierra@xes-inc.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>