With board files, all I2C busses run at 400KHz. Fix the device-tree
to be consistent with this. It's possible this is incorrect, but at
least it keeps the board files and device-tree consistent.

Also, disable any I2C controllers that the board files don't register,
also for consistency.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

The command-lines present in the existing /chosen node are not necessarily
correct for all users. Ideally, we should simply use the command-line
supplied by the boot-loader.

In fact, using the boot-loader's cmdline is quite easy; either the
bootloader fully supports DT, in which case it can modify the DT passed
to the kernel to include its command-line, or CONFIG_APPENDED_DTB can
be used in conjunction with CONFIG_ARM_ATAG_DTB_COMPAT, and the kernel
will substitute the bootloader's command-line into the DT.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

There are no drivers in the kernel at present which can make use of the
memory reserved by /memreserve/, so there is no point reserving it. Remove
/memreserve/ to allow the user more memory. It's also unclear whether any
future driver would actually require /memreserve/, or allocate memory
through some other mechanism.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

This adds a dts file for paz00. As a side effect, this also enables
the embedded controller which controls the keyboard, touchpad, power,
leds, and some other functions.

Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: NMarc Dietrich <marvin24@gmx.de>
Acked-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

* Add device-tree file for TrimSlice
* Add that to the list of .dts files to build
* Update board-dt.c to recognize TrimSlice board name

v2: Makefile: Add board-trimslice-pinmux.c to obj-$(CONFIG_MACH_TEGRA_DT).
v3: Makefile: Use brackets not braces around var names
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

The I2S and DAS nodes don't have children, and hence don't need to set
address/size cells.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

For now they are a minimal binding. It needs to be amended with
vendor-specific settings for phy setup and link tuning, etc.

v2: Added bindings specification and phy_type properties
Signed-off-by: NOlof Johansson <olof@lixom.net>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Acked-by: NStephen Warren <swarren@nvidia.com>

Ventana uses the same SDHCI GPIOs as Seaboard; PI6 (70) is the power GPIO
for the SD port, and there is no power GPIO for the MMC chip.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

It adds device tree source and documentation for imx6q platform.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This adds the devicetree source and documentation for the Calxeda highbank
platform.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Reviewed-by: NJamie Iles <jamie@jamieiles.com>
Reviewed-by: NShawn Guo <shawn.guo@linaro.org>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Reviewed-by: NRob Herring <rob.herring@calxeda.com>

Create a new device tree source file for Atmel at91sam9g45 SoC family.
The Evaluation Kit at91sam9m10g45ek includes it.
This first basic support will be populated as drivers and boards will be
converted to device tree.
Contains serial, dma and interrupt controllers.

The generic board file still takes advantage of platform data for early serial
init. As we need a storage media and the NAND flash driver is not converted to
DT yet, we keep old initialization for it.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Reviewed-by: NRob Herring <rob.herring@calxeda.com>

Cc: Rob Herring <robherring2@gmail.com>
Signed-off-by: NBarry Song <Baohua.Song@csr.com>

It adds device tree support for imx51 babbage board.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

It adds device tree support for imx53 boards.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Add a pinmux node to tegra20.dtsi in order to instantiate the future
pinmux device.

v2: Specify reg property precisely; don't just point at the whole APB_MISC
register range.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Add nodes for devices used by PM code (mpu, dsp, iva).

Add a cpus node as well as recommended in the DT spec.

Remove mpu, dsp, iva devices init if is populated.
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Cc: Kevin Hilman <khilman@ti.com>

Used the main OCP node to add bindings with the l3_noc driver.
Remove l3_noc static device creation if DT is populated.
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>

Add OMAP3 beagleboard DTS file to use the omap3.dtsi SoC file.

Add a default bootargs line to allow a boot from RAMDISK.

Add memory node information.
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Cc: G, Manjunath Kondaiah <manjugk@ti.com>

Add initial OMAP3 soc file with empty ocp bus.

Based on initial patch from Manju:
http://www.spinics.net/lists/linux-omap/msg55830.htmlSigned-off-by: NBenoit Cousson <b-cousson@ti.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Cc: G, Manjunath Kondaiah <manjugk@ti.com>

Add the SDP/Blaze (Software Development Board) support with
device tree.
That file is based on the omap4-panda.dts.
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Cc: G, Manjunath Kondaiah <manjugk@ti.com>

Based on the original omap4-panda.dts file from Manju.
http://www.spinics.net/lists/linux-omap/msg55836.html

Add memory information and a default bootargs to allow
a boot from RAMDISK.
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Cc: G, Manjunath Kondaiah <manjugk@ti.com>

Add initial device-tree support for OMAP4 SoC.

This is based on the original panda board patch done by Manju:
http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393

Add the generic GIC interrupt-controller from ARM.

Add an empty "soc" node to contain non memory mapped IPs
(DSP, MPU, IPU...).

Note: Since reg, irq and dma are provided by hwmod for the
moment, these attributes will not be present at all in DTS
to highlight the gap. They will be added as soon as dma bindings
will be there and drivers will be adapted.
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Cc: G, Manjunath Kondaiah <manjugk@ti.com>

The PC7302 board can be populated with either a PC3X2 or PC3X3 device.
Add DTS files for both variants of the PC7302.

v3:	- remove bootargs from dts files
Signed-off-by: NJamie Iles <jamie@jamieiles.com>

This describes the basic hierarchy of picoxcell pc3x3 devices including
clocks and bus interconnect.  Some onchip devices are currently omitted
as there haven't been bindings created for them.

v2:	- change timer compatible strings to be more soc specific
	- split vic node into 2 devices
Signed-off-by: NJamie Iles <jamie@jamieiles.com>

For Seaboard's internal eMMC, this makes the difference between a
5.5MB/s and 10.2MB/s transfer rate. On Harmony, there wasn't any
measurable difference on my cheap/slow ~2MB/s card.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

The bindings were recently updated to have separate properties for each
type of GPIO. Update the Device Tree source to match that.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

The module is a bridge between the RTC clock domain and the CPU interface
clock domain. ARM access the register of SYSRTC, GPSRTC and PWRC through
this module.
Signed-off-by: NZhiwu Song <zhiwu.song@csr.com>
Signed-off-by: NBarry Song <Baohua.Song@csr.com>
Reviewed-by: NJamie Iles <jamie@jamieiles.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>

gpio controller handles the switch of gpio and pinmux. And drivers/pinctrl/pinmux-sirf.c
will contain both gpio and pinmux.

Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: NBarry Song <Baohua.Song@csr.com>

Signed-off-by: NBarry Song <Baohua.Song@csr.com>

Adds support for booting via device tree with a simple serial console.

Change-Id: I7f175b8db21928cd13e0fb49f3eed74966a2696f
Signed-off-by: NDavid Brown <davidb@codeaurora.org>
Acked-by: NArnd Bergmann <arnd@arndb.de>

Everything required to populate NVIDIA Tegra devices from the device
tree.  This patch adds a new DT_MACHINE_DESC() which matches against
a tegra20 device tree.  So far it only registers the on-chip devices,
but it will be refined in follow on patches to configure clocks and
pin IO from the device tree also.
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

For testing the dt work, define a dt-enabled versatile platform.

This patch adds a new versatile platform for when using the device
tree.  Add platform and amba devices are discovered and registered by
parsing the device tree.  Clocks and initial io mappings are still
configured statically.

This patch still depends on some static platform_data for a few devices
which is passed via the auxdata structure to of_platform_populate(),
but it is a viable starting point until the drivers can get all
configuration data out of the device tree.
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

Contains the bare minimum template required to boot with the device tree.
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

SiRFprimaII is the latest generation application processor from CSR’s
Multifunction SoC product family. Designed around an ARM cortex A9 core,
high-speed memory bus, advanced 3D accelerator and full-HD multi-format
video decoder, SiRFprimaII is able to meet the needs of complicated
applications for modern multifunction devices that require heavy concurrent
applications and fluid user experience. Integrated with GPS baseband,
analog and PMU, this new platform is designed to provide a cost effective
solution for Automotive and Consumer markets.

This patch adds the basic support for this SoC and EVB board based on device
tree. It is following the ZYNQ of Xilinx in some degree.
Signed-off-by: NBinghua Duan <Binghua.Duan@csr.com>
Signed-off-by: NRongjun Ying <Rongjun.Ying@csr.com>
Signed-off-by: NZhiwu Song <Zhiwu.Song@csr.com>
Signed-off-by: NYuping Luo <Yuping.Luo@csr.com>
Signed-off-by: NBin Shi <Bin.Shi@csr.com>
Signed-off-by: NHuayi Li <Huayi.Li@csr.com>
Signed-off-by: NBarry Song <Baohua.Song@csr.com>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

The 1st board support is minimal to get a system up and running
on the Xilinx platform.

This platform reuses the clock implementation from plat-versatile, and
it depends entirely on CONFIG_OF support.  There is only one board
support file which obtains all device information from a device tree
dtb file which is passed to the kernel at boot time.
Signed-off-by: NJohn Linn <john.linn@xilinx.com>