1. 26 6月, 2015 5 次提交
  2. 25 6月, 2015 5 次提交
  3. 23 6月, 2015 1 次提交
  4. 22 6月, 2015 5 次提交
  5. 20 6月, 2015 1 次提交
  6. 19 6月, 2015 3 次提交
  7. 18 6月, 2015 1 次提交
  8. 17 6月, 2015 1 次提交
  9. 15 6月, 2015 3 次提交
  10. 14 6月, 2015 1 次提交
  11. 13 6月, 2015 1 次提交
  12. 12 6月, 2015 1 次提交
  13. 11 6月, 2015 3 次提交
  14. 10 6月, 2015 2 次提交
  15. 06 6月, 2015 1 次提交
    • D
      PCI: xgene: Add APM X-Gene v1 PCIe MSI/MSIX termination driver · dcd19de3
      Duc Dang 提交于
      APM X-Gene v1 SoC supports its own implementation of MSI, which is not
      compliant to GIC V2M specification for MSI Termination.
      
      There is a single MSI block in X-Gene v1 SOC which serves all 5 PCIe ports.
      This MSI block supports 2048 MSI termination ports coalesced into 16
      physical HW IRQ lines and shared across all 5 PCIe ports.
      
      As there are only 16 HW IRQs to serve 2048 MSI vectors, to support
      set_affinity correctly for each MSI vectors, the 16 HW IRQs are statically
      allocated to 8 X-Gene v1 cores (2 HW IRQs for each cores).  To steer MSI
      interrupt to target CPU, MSI vector is moved around these HW IRQs lines.
      With this approach, the total MSI vectors this driver supports is reduced
      to 256.
      
      [bhelgaas: squash doc, driver, maintainer update]
      Signed-off-by: NDuc Dang <dhdang@apm.com>
      Signed-off-by: NTanmay Inamdar <tinamdar@apm.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Reviewed-by: NMarc Zyngier <marc.zyngier@arm.com>
      dcd19de3
  16. 04 6月, 2015 2 次提交
  17. 03 6月, 2015 3 次提交
  18. 02 6月, 2015 1 次提交
    • G
      gpio: Add GPIO support for Broadcom STB SoCs · 3b0213d5
      Gregory Fong 提交于
      This adds support for the GPIO IP "UPG GIO" used on
      Broadcom STB SoCs (BCM7XXX and some others). Uses
      basic_mmio_gpio to instantiate a gpio_chip for each bank.
      The driver assumes that it handles the base set of GPIOs
      on the system and that it can start its numbering sequence
      from 0, so any GPIO expanders used with it must dynamically
      assign GPIO numbers after this driver has finished
      registering its GPIOs.
      
      Does not implement the interrupt-controller portion yet,
      will be done in a future commit.
      
      v2:
      - change include to use <linux/gpio/driver.h> instead of
        <linux/gpio.h>
      - get rid of unnecessary imask member in struct bank
      - rename GPIO_PER_BANK -> MAX_GPIO_PER_BANK
      - always have 32 GPIOs per bank and add 'width' member in
        struct bank to hold actual number of GPIOs in use
      - mark of_match table as const
      List-usage-fixed-by: NBrian Norris <computersforpeace@gmail.com>
      Signed-off-by: NGregory Fong <gregory.0xf0@gmail.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      3b0213d5