1. 27 3月, 2018 2 次提交
  2. 24 3月, 2018 1 次提交
  3. 20 3月, 2018 3 次提交
  4. 27 2月, 2018 1 次提交
  5. 14 2月, 2018 1 次提交
  6. 13 2月, 2018 6 次提交
  7. 27 1月, 2018 7 次提交
  8. 11 1月, 2018 1 次提交
  9. 06 1月, 2018 1 次提交
    • J
      i40e: setup xdp_rxq_info · 87128824
      Jesper Dangaard Brouer 提交于
      The i40e driver has a special "FDIR" RX-ring (I40E_VSI_FDIR) which is
      a sideband channel for configuring/updating the flow director tables.
      This (i40e_vsi_)type does not invoke XDP-ebpf code.
      
      As suggested by Björn (V2): Instead of marking this I40E_VSI_FDIR RX-ring
      a special case, reverse the logic and only select RX-rings of type
      I40E_VSI_MAIN to register xdp_rxq_info's for.
      
      Driver hook points for xdp_rxq_info:
       * reg  : i40e_setup_rx_descriptors (via i40e_vsi_setup_rx_resources)
       * unreg: i40e_free_rx_resources    (via i40e_vsi_free_rx_resources)
      
      Tested on actual hardware with samples/bpf program.
      
      V2: Fixed bug in i40e_set_ringparam (memset zero) + match on I40E_VSI_MAIN.
      V4: Update patch desc that got out-of-sync with code.
      
      Cc: intel-wired-lan@lists.osuosl.org
      Cc: Björn Töpel <bjorn.topel@intel.com>
      Cc: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
      Cc: Paul Menzel <pmenzel@molgen.mpg.de>
      Signed-off-by: NJesper Dangaard Brouer <brouer@redhat.com>
      Reviewed-by: NPaul Menzel <pmenzel@molgen.mpg.de>
      Acked-by: NJohn Fastabend <john.fastabend@gmail.com>
      Signed-off-by: NAlexei Starovoitov <ast@kernel.org>
      87128824
  10. 01 11月, 2017 1 次提交
  11. 25 10月, 2017 1 次提交
    • M
      locking/atomics: COCCINELLE/treewide: Convert trivial ACCESS_ONCE() patterns... · 6aa7de05
      Mark Rutland 提交于
      locking/atomics: COCCINELLE/treewide: Convert trivial ACCESS_ONCE() patterns to READ_ONCE()/WRITE_ONCE()
      
      Please do not apply this to mainline directly, instead please re-run the
      coccinelle script shown below and apply its output.
      
      For several reasons, it is desirable to use {READ,WRITE}_ONCE() in
      preference to ACCESS_ONCE(), and new code is expected to use one of the
      former. So far, there's been no reason to change most existing uses of
      ACCESS_ONCE(), as these aren't harmful, and changing them results in
      churn.
      
      However, for some features, the read/write distinction is critical to
      correct operation. To distinguish these cases, separate read/write
      accessors must be used. This patch migrates (most) remaining
      ACCESS_ONCE() instances to {READ,WRITE}_ONCE(), using the following
      coccinelle script:
      
      ----
      // Convert trivial ACCESS_ONCE() uses to equivalent READ_ONCE() and
      // WRITE_ONCE()
      
      // $ make coccicheck COCCI=/home/mark/once.cocci SPFLAGS="--include-headers" MODE=patch
      
      virtual patch
      
      @ depends on patch @
      expression E1, E2;
      @@
      
      - ACCESS_ONCE(E1) = E2
      + WRITE_ONCE(E1, E2)
      
      @ depends on patch @
      expression E;
      @@
      
      - ACCESS_ONCE(E)
      + READ_ONCE(E)
      ----
      Signed-off-by: NMark Rutland <mark.rutland@arm.com>
      Signed-off-by: NPaul E. McKenney <paulmck@linux.vnet.ibm.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: davem@davemloft.net
      Cc: linux-arch@vger.kernel.org
      Cc: mpe@ellerman.id.au
      Cc: shuah@kernel.org
      Cc: snitzer@redhat.com
      Cc: thor.thayer@linux.intel.com
      Cc: tj@kernel.org
      Cc: viro@zeniv.linux.org.uk
      Cc: will.deacon@arm.com
      Link: http://lkml.kernel.org/r/1508792849-3115-19-git-send-email-paulmck@linux.vnet.ibm.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
      6aa7de05
  12. 18 10月, 2017 13 次提交
  13. 14 10月, 2017 1 次提交
    • A
      i40e: Enable 'channel' mode in mqprio for TC configs · a9ce82f7
      Amritha Nambiar 提交于
      The i40e driver is modified to enable the new mqprio hardware
      offload mode and factor the TCs and queue configuration by
      creating channel VSIs. In this mode, the priority to traffic
      class mapping and the user specified queue ranges are used
      to configure the traffic classes by setting the mode option to
      'channel'.
      
      Example:
        map 0 0 0 0 1 2 2 3 queues 2@0 2@2 1@4 1@5\
        hw 1 mode channel
      
      qdisc mqprio 8038: root  tc 4 map 0 0 0 0 1 2 2 3 0 0 0 0 0 0 0 0
                   queues:(0:1) (2:3) (4:4) (5:5)
                   mode:channel
                   shaper:dcb
      
      The HW channels created are removed and all the queue configuration
      is set to default when the qdisc is detached from the root of the
      device.
      
      This patch also disables setting up channels via ethtool (ethtool -L)
      when the TCs are configured using mqprio scheduler.
      
      The patch also limits setting ethtool Rx flow hash indirection
      (ethtool -X eth0 equal N) to max queues configured via mqprio.
      The Rx flow hash indirection input through ethtool should be
      validated so that it is within in the queue range configured via
      tc/mqprio. The bound checking is achieved by reporting the current
      rss size to the kernel when queues are configured via mqprio.
      
      Example:
        map 0 0 0 1 0 2 3 0 queues 2@0 4@2 8@6 11@14\
        hw 1 mode channel
      
      Cannot set RX flow hash configuration: Invalid argument
      Signed-off-by: NAmritha Nambiar <amritha.nambiar@intel.com>
      Tested-by: NAndrew Bowers <andrewx.bowers@intel.com>
      Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      a9ce82f7
  14. 06 10月, 2017 1 次提交
    • J
      i40e/i40evf: organize and re-number feature flags · b74f571f
      Jacob Keller 提交于
      Now that we've reduced the number of flags, organize similar flags
      together and re-number them accordingly.
      
      Since we don't yet have more than 32 flags, we'll use a u32 for both the
      hw_features and flag field. Should we gain more flags in the future, we
      may need to convert to a u64 or separate flags out into two fields.
      
      One alternative approach considered, but not implemented here, was to
      use an enumeration for the flag variables, and create a macro
      I40E_FLAG() which used string concatenation to generate BIT_ULL values.
      This has the advantage of making the actual bit values compile-time
      dynamic so that we do not need to worry about matching the order to the
      bit value. However, this does produce a high level of code churn, and
      makes it more difficult to read a dumped flags value when debugging.
      
      Change-ID: I8653fff69453cd547d6fe98d29dfa9d8710387d1
      Signed-off-by: NJacob Keller <jacob.e.keller@intel.com>
      Reviewed-by: NMitch Williams <mitch.a.williams@intel.com>
      Tested-by: NAndrew Bowers <andrewx.bowers@intel.com>
      Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      b74f571f