- 03 5月, 2012 3 次提交
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由 Matthew Vick 提交于
For 82574 and 82583 devices, resolve an intermittent link issue where the link negotiates to 100Mbps rather than 1Gbps when powering off the PHY and powering on the PHY after several seconds. Signed-off-by: NMatthew Vick <matthew.vick@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Bruce Allan 提交于
Calling the locked versions of the read/write PHY ops function pointers often produces excessively long lines. Shorten these as is done with the non-locked versions of the PHY register read/write functions. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Bruce Allan 提交于
There is a known issue in the 82577 and 82578 device that can cause a hang in the device hardware during traffic stress; the current workaround in the driver is to disable transmit flow control by default. If the user enables transmit flow control and the device hang occurs, provide a message in the syslog suggesting to re-enable the workaround. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NJeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 02 5月, 2012 3 次提交
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由 Bruce Allan 提交于
Secondary unicast and multicast addresses are added to the Receive Address registers (RAR) for most parts supported by the driver. For 82579, there is only one actual RAR and a number of Shared Receive Address registers (SHRAR) that are shared among the driver and f/w which can be reserved and write-protected by the f/w. On this device, use the SHRARs that are not taken by f/w for the additional addresses. Add a MAC ops function pointer infrastructure (similar to other MAC operations in the driver) for setting RARs, introduce a new rar_set function for 82579 and convert the existing code that sets RARs on other devices to a generic rar_set function. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NJeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Bruce Allan 提交于
The PHY initialization flows and assorted workarounds for 82577/8/9 done during driver load and resume from Sx should be the same yet they are not. Combine the current flows/workarounds into a common set of functions that are called during the different code paths. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Bruce Allan 提交于
An update to the EEPROM on 82579 will extend a delay in hardware to fix an issue with WoL not working after a G3->S5 transition which is unrelated to the driver. However, this extended delay conflicts with nominal operation of the device when it is initialized by the driver and after every reset of the hardware (i.e. the driver starts configuring the device before the hardware is done with it's own configuration work). The workaround for when the driver is in control of the device is to tell the hardware after every reset the configuration delay should be the original shorter one. Some pre-existing variables are renamed generically to be re-used with new register accesses. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NJeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 01 5月, 2012 1 次提交
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由 Willem de Bruijn 提交于
Signed-off-by: NWillem de Bruijn <willemb@google.com> Acked-by: NEric Dumazet <edumazet@google.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 27 4月, 2012 4 次提交
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由 Bruce Allan 提交于
Previously, a workaround was added to address a hardware bug in the PCIm2PCI arbiter where a write by the driver of the Transmit/Receive Descriptor Tail register could happen concurrently with a write of any MAC CSR register by the Manageability Engine (ME) which could cause the Tail register to have an incorrect value. The arbiter is supposed to prevent the concurrent writes but there is a bug that can cause the Host (driver) access to be acknowledged later than it should. After further investigation, it was discovered that a driver write access of any MAC CSR register after being idle for some time can be lost when ME is accessing a MAC CSR register. When this happens, no further target access is claimed by the MAC which could hang the system. The workaround to check bit 24 in the FWSM register (set only when ME is accessing a MAC CSR register) and delay for a limited amount of time until it is cleared is now done for all driver writes of MAC CSR registers on 82579 with ME enabled. In the rare case when the driver is writing the Tail register and ME is accessing any MAC CSR register for a duration longer than the maximum delay, write the register and verify it has the correct value before continuing, otherwise reset the device. This patch also moves some pre-existing macros from the hardware-specific header file to the more appropriate generic driver header file. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NJeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Bruce Allan 提交于
In K1 mode (a MAC/PHY interconnect power mode), the 82579 device shuts down the Phase Lock Loop (PLL) of the interconnect to save power. When the PLL starts working, the 82579 device may start to transfer the packet through the interconnect before it is fully functional causing packet drops. This workaround disables shutting down the PLL in K1 mode for 1G link speed. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NJeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Matthew Vick 提交于
Performance testing has shown that enabling DMA burst on 82574 improves performance on small packets, so enable it by default. Signed-off-by: NMatthew Vick <matthew.vick@intel.com> Tested-by: NJeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Matthew Vick 提交于
80003ES2LAN has an errata such that far-end loopback may be activated by bit errors producing a reserved symbol. In order to disable far-end loopback quickly enough, disable it immediately following a reset. Signed-off-by: NMatthew Vick <matthew.vick@intel.com> Tested-by: NJeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 14 4月, 2012 3 次提交
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由 Bruce Allan 提交于
Replace occurrences of 'if (<bool expr> == <1|0>)' with 'if ([!]<bool expr>)' Replace occurrences of '<bool var> = (<non-bool expr>) ? true : false' with '<bool var> = <non-bool expr>'. Replace occurrence of '<bool var> = <non-bool expr>' with '<bool var> = !!<non-bool expr>' While the latter replacement is not really necessary, it is done here for consistency and clarity. No functional changes. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Bruce Allan 提交于
Now that split strings generate checkpatch warnings (per Chapter 2 of Documentation/CodingStyle to make it easier to grep the code for the string) cleanup the remaining instances of them in the driver. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Bruce Allan 提交于
A workaround was previously put in the driver to reset the device when transitioning to Sx in order to activate the changed settings of the PHY OEM bits (Low Power Link Up, or LPLU, and GbE disable configuration) for 82577/8/9 devices. After further review, it was found such a reset can cause the 82579 to confuse which version of 82579 it actually is and broke LPLU on all 82577/8/9 devices. The workaround during an S0->Sx transition on 82579 (instead of resetting the PHY) is to restart auto-negotiation after the OEM bits are configured; the restart of auto-negotiation activates the new OEM bits as does the reset. With 82577/8, the reset is changed to a generic reset which fixes the LPLU bits getting set wrong. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 04 4月, 2012 6 次提交
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由 Bruce Allan 提交于
Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Bruce Allan 提交于
Some Rx and Tx specific registers are arrays indexed by the queue number. For clarity, specify the intended queue rather than obscuring it behind a define. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Bruce Allan 提交于
Rename NAPI polling routine and a parameter with more appropriate names, refactor a conditional branch to get rid of an unnecessary goto/label and fix a line exceeding 80 columns. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Matthew Vick 提交于
Move the first phrase of a multi-line comment to the second line. Signed-off-by: NMatthew Vick <matthew.vick@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Matthew Vick 提交于
In rare circumstances, a descriptor writeback flush may not work if it arrives on a specific clock cycle as a writeback request is going out. Signed-off-by: NMatthew Vick <matthew.vick@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Bruce Allan 提交于
When the adapter is closed while it is simultaneously going through a reset, it can cause a null-pointer dereference when the two different code paths simultaneously cleanup up the Tx/Rx resources. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 28 3月, 2012 1 次提交
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由 stephen hemminger 提交于
Dan Carpenter noticed that ixgbevf initial default was different than the rest. But the problem is broader than that, only one Intel driver (ixgb) was doing it almost right. The convention for default debug level should be consistent among Intel drivers and follow established convention. Signed-off-by: NStephen Hemminger <shemminger@vyatta.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 20 3月, 2012 1 次提交
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由 Cong Wang 提交于
Acked-by: NDavid S. Miller <davem@davemloft.net> Signed-off-by: NCong Wang <amwang@redhat.com>
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- 01 3月, 2012 3 次提交
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由 Bruce Allan 提交于
The e1000_link_stall_workaround_lv() function is always called in non- atomic context so it should use msleep instead of mdelay. Also, remove unnecessary #include <linux/delay.h>. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Bruce Allan 提交于
Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Bruce Allan 提交于
Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 25 2月, 2012 11 次提交
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由 Bruce Allan 提交于
Rename e1000e_reload_nvm() to e1000e_reload_nvm_generic() to signify the function is used for more than one MAC-family type, and set and use it as a MAC ops function pointer to be consistent with the driver design. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Bruce Allan 提交于
Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Bruce Allan 提交于
Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Bruce Allan 提交于
Remove reference to non-existant function. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Bruce Allan 提交于
Rename e1000e_config_collision_dist() to e1000e_config_collision_dist_generic() to signify the function is used for more than one MAC-family type, and set and use it as a MAC ops function pointer to be consistent with the driver design. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Bruce Allan 提交于
Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Bruce Allan 提交于
Call the MAC ops setup_physical_interface function pointer instead of the MAC-family-specific function to conform to the rest of the driver design. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Bruce Allan 提交于
Replace e1000_check_reset_block() inline function with calls to the PHY ops check_reset_block function pointer. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Bruce Allan 提交于
Replace e1000_check_mng_mode() inline function with calls to the MAC ops check_mng_mode function pointer. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Bruce Allan 提交于
Rename e1000e_setup_link() to e1000e_setup_link_generic() to signify the function is used for more than one MAC-family type. The 82571-family has a custom setup_link function which also calls the generic function. The ich8lan-family has a custom function which should just be called via the function pointer. The 80003es2lan-family just uses the generic function. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Bruce Allan 提交于
Rename e1000e_id_led_init() to e1000e_id_led_init_generic() to signify the function is used for more than one MAC-family type. For the ich8lan MAC family, some MACs use the generic function and others use the function e1000_id_led_init_pchlan(). In all cases where e1000e_id_led_init() was called directly, change to call the function pointer to be consistent with the driver design. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 24 2月, 2012 4 次提交
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由 Bruce Allan 提交于
Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Bruce Allan 提交于
Recent discussions on LKML, kernel-janitors, linux-wireless and netdev have suggested boolean comparisons should use logical operators instead of equality comparisons with true/false. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Ben Greear 提交于
This allows the NIC to receive all frames available, including those with bad FCS, un-matched vlans, ethernet control frames, and more. Tested by sending frames with bad FCS. Signed-off-by: NBen Greear <greearb@candelatech.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Ben Greear 提交于
This can aid with testing the RX logic for bad CRCs. Signed-off-by: NBen Greear <greearb@candelatech.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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