- 20 1月, 2015 1 次提交
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由 Guo Zeng 提交于
this patch adds UART0 and UART1 as LLUART port, as the new Atlas7 registers layout are different, it also refines some names of old hard-coded MARCOs and uses CONFIG_DEBUG_UART_PHYS/DEBUG_UART_VIRT to define different base addresses for multiple ports. Signed-off-by: NGuo Zeng <Guo.Zeng@csr.com> Signed-off-by: NZhiwu Song <Zhiwu.Song@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Acked-by: NArnd Bergmann <arnd@arndb.de>
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- 14 1月, 2015 1 次提交
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由 Barry Song 提交于
Marco will not be supported any more. it has been replaced by CSR Atlas7. Signed-off-by: NBarry Song <Baohua.Song@csr.com> Acked-by: NArnd Bergmann <arnd@arndb.de>
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- 25 3月, 2013 1 次提交
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由 Arnd Bergmann 提交于
The new style ll_debug implementation for multiplatform requires the platform glue to be in include/debug, so let's move it there to separate the debugging logic from the platform code. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Tested-by: NBarry Song <Baohua.Song@csr.com>
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- 26 9月, 2011 1 次提交
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由 Nicolas Pitre 提交于
Some platforms (like OMAP not to name it) are doing rather complicated hacks just to determine the base UART address to use. Let's give their addruart macro some slack by providing an extra work register which will allow for much needed cleanups. This is basically a no-op as this commit is only adding the extra argument to the macro but no one is using it yet. Signed-off-by: Nnicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: NKevin Hilman <khilman@ti.com>
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- 09 7月, 2011 1 次提交
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由 Binghua Duan 提交于
SiRFprimaII is the latest generation application processor from CSR’s Multifunction SoC product family. Designed around an ARM cortex A9 core, high-speed memory bus, advanced 3D accelerator and full-HD multi-format video decoder, SiRFprimaII is able to meet the needs of complicated applications for modern multifunction devices that require heavy concurrent applications and fluid user experience. Integrated with GPS baseband, analog and PMU, this new platform is designed to provide a cost effective solution for Automotive and Consumer markets. This patch adds the basic support for this SoC and EVB board based on device tree. It is following the ZYNQ of Xilinx in some degree. Signed-off-by: NBinghua Duan <Binghua.Duan@csr.com> Signed-off-by: NRongjun Ying <Rongjun.Ying@csr.com> Signed-off-by: NZhiwu Song <Zhiwu.Song@csr.com> Signed-off-by: NYuping Luo <Yuping.Luo@csr.com> Signed-off-by: NBin Shi <Bin.Shi@csr.com> Signed-off-by: NHuayi Li <Huayi.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Reviewed-by: NArnd Bergmann <arnd@arndb.de>
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