1. 13 7月, 2012 3 次提交
  2. 20 6月, 2012 1 次提交
  3. 15 3月, 2012 2 次提交
  4. 10 3月, 2012 2 次提交
  5. 21 1月, 2012 3 次提交
  6. 23 12月, 2011 1 次提交
  7. 14 9月, 2011 2 次提交
  8. 06 6月, 2011 1 次提交
  9. 29 9月, 2010 3 次提交
  10. 09 9月, 2010 4 次提交
  11. 08 9月, 2010 1 次提交
  12. 01 9月, 2010 2 次提交
  13. 02 2月, 2010 1 次提交
  14. 21 1月, 2010 6 次提交
  15. 17 12月, 2009 1 次提交
    • J
      spi: Add s3c64xx SPI Controller driver · 230d42d4
      Jassi Brar 提交于
      Each SPI controller has exactly one CS line and as such doesn't
      provide for multi-cs. We implement a workaround to support
      multi-cs by _not_ configuring the mux'ed CS pin for each SPI
      controller. The CS mechanism is assumed to be fully machine
      specific - the driver doesn't even assume some GPIO pin is used
      to control the CS.
      
      The driver selects between DMA and POLLING mode depending upon
      the xfer size - DMA mode for xfers bigger than FIFO size, POLLING
      mode otherwise.
      
      The driver has been designed to be capable of running SoCs since
      s3c64xx and till date, for that reason some of the register fields
      have been passed via, SoC specific, platform data.
      Signed-off-by: NJassi Brar <jassi.brar@samsung.com>
      Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
      230d42d4