VOP can support BGR formats in all windows thanks to red/blue swap option
provided in WINx_CTRL0 registers. This patch enables support for
ABGR8888, XBGR8888, BGR888 and BGR565 formats by using this feature.
Signed-off-by: NTomasz Figa <tfiga@chromium.org>

platform_get_irq() can return negative error values and we already test for
these. Therefore the variable holding this value should be signed to not
loose possible error values.
Reported-by: NDavid Binderman <dcb314@hotmail.com>
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Reviewed-By: NDaniel Kurtz <djkurtz@chromium.org>

Reference the power domain incase vop power down when
in use.
Signed-off-by: NMark Yao <yzq@rock-chips.com>

The function disables the dclk at the beginning, so don't simply return
when an error happens, but instead enable the clock again, so that
enable and disable calls are balanced.

ret_clk is introduced to hold the clk_enable result and not mangle the
original error code.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Reviewed-by: NDaniel Kurtz <djkurtz@chromium.org>

Vop standby will take effect at end of current frame,
if dsp_hold_valid_irq happen, it means vop standby complete.

we must wait standby complete when we want to disable aclk,
if not, memory bus maybe dead.
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Reviewed-by: NDaniel Kurtz <djkurtz@chromium.org>
Signed-off-by: NMark Yao <mark.yao@rock-chips.com>

there is a Bug that:
  vop_enable()->drm_vblank_on, drm_vblank_on may call vop
enable vblank. if it happen, vblank enable would failed,
then cause irq status error. because is_enabled value is set
after drm_vblank_on.

after enable vop clocks and iommu regs, we can sure that
R/W vop regs and do vop plane flip is safe, so place
is_enabled = true after enable iommu is suitable.
Signed-off-by: NMark Yao <mark.yao@rock-chips.com>

drm dpms have many power modes: ON,OFF,SUSPEND,STANDBY, etc.
but vop only have enable/disable mode, maybe case such bug:
 --> DRM_DPMS_ON: power on vop
 --> DRM_DPMS_SUSPEND: power off vop
 --> DRM_DPMS_OFF: already power off at SUSPEND, crash
so use a bool val is more suitable.
Signed-off-by: NMark Yao <mark.yao@rock-chips.com>

Vop set wrong vsync/hsync polarity, it may cause some
display problem. known problem is that caused HDMI hdcp
authenticate failed, caused pixel offset with hdmi display.
the polarity description at RK3288 TRM doc:
  dsp_vsync_pol
    VSYNC polarity
      1'b0 : negative
      1'b1 : positive
      dsp_hsync_pol
    HSYNC polarity
      1'b0 : negative
      1'b1 : positive
Signed-off-by: NMark Yao <mark.yao@rock-chips.com>
Reviewed-by: NDaniel Kurtz <djkurtz@chromium.org>
Tested-by: NCaesar Wang <wxt@rock-chips.com>
Tested-by: NHeiko Stuebner <heiko@sntech.de>

To build the rockchip dw_hdmi driver as a module, the
rockchip_drm_encoder_get_mux_id and rockchip_drm_crtc_mode_config
functions need to be exported.
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

This patch adds the basic structure of a DRM Driver for Rockchip Socs.
Signed-off-by: NMark Yao <mark.yao@rock-chips.com>
Signed-off-by: NDaniel Kurtz <djkurtz@chromium.org>
Acked-by: NDaniel Vetter <daniel@ffwll.ch>
Reviewed-by: NRob Clark <robdclark@gmail.com>