Since WFI may cause the processor to enter a low-power mode, data may
still be in the write buffer. This patch adds a DSB (or DWB) to the
cpu_(v6|v7)_do_idle functions before the WFI.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>

This patch adds the SMP/nAMP mode setting to __v7_setup and also sets
TTBR to shared page table walks if SMP is enabled. The PTWs are also
marked inner cacheable for both SMP and UP modes (setting this is fine
even if the CPU doesn't support the feature).
Signed-off-by: NJon Callan <Jon.Callan@arm.com>
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>

This register is set in __enable_mmu in the head.S file.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>

In case of non-aliasing VIPT caches, there is no need to flush the whole
cache when new mapping is created. The patch introduces this condition
check. In the non-aliasing VIPT case flush_cache_vmap() needs a DSB
since the set_pte_at() function called from vmap_pte_range() does not
have such barrier (done usually via TLB flushing functions).
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>

On ARMv7, conditional undefined instructions may generate exceptions
even if the condition is not met. The vfphw.S contains the FPINST and
FPINST2 access instructions which may not be present on processors with
synchronous VFP exceptions.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>

The flush_cache_all function on ARMv7 is implemented as a series of
cache operations by set/way. These are not guaranteed to be ordered with
previous memory accesses, requiring a DMB. This patch also adds barriers
for the TLB operations in compressed/head.S
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>

Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>

This part was missed in the initial patch adding ThumbEE support.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>

Signed-off-by: NNicolas Pitre <nico@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Those inline assembly segments using the umlal instruction must have
the & modifier so to be sure that a purely input register won't alias
one of the registers used as input+output.  In most cases, the inputs
are still used after the outputs are touched, and most binutil versions
insist on "rdhi, rdlo and rm must all be different" even for ARMv6+.
Signed-off-by: NNicolas Pitre <nico@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

A typo caused these values to be swapped leading to incorrect memory
type attributes.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

From: David Brownell <dbrownell@users.sourceforge.net>

The "5298/1: Drop desc_handle_irq()" patch went overboard
and deleted an essential line of code, causing all AT91
GPIO interrupts to oops (in irq).  Trimmed example:

Unable to handle kernel NULL pointer dereference at virtual address 000000c4
...
PC is at gpio_irq_handler+0x78/0xd0
LR is at gpio_irq_handler+0x38/0xd0
...
Backtrace:
[<c0029884>] (gpio_irq_handler+0x0/0xd0) from [<c0020054>] (__exception_text_start+0x54/0x7c)
[<c0020000>] (__exception_text_start+0x0/0x7c) from [<c00209ec>] (__irq_svc+0x2c/0x60)
Exception stack(0xc1c1de00 to 0xc1c1de48)
[<c01f4ca8>] (_spin_unlock_irq+0x0/0x3c) from [<c01389f8>] (at91ether_open+0x220/0x318)
[<c01387d8>] (at91ether_open+0x0/0x318) from [<c018caa4>] (dev_open+0xa8/0x10c)
[<c018c9fc>] (dev_open+0x0/0x10c) from [<c018b874>] (dev_change_flags+0x98/0x164)
[<c018b7dc>] (dev_change_flags+0x0/0x164) from [<c0019f8c>] (ip_auto_config+0x164/0xe28)
[<c0019e28>] (ip_auto_config+0x0/0xe28) from [<c0020318>] (__exception_text_end+0x60/0x180)
[<c00202b8>] (__exception_text_end+0x0/0x180) from [<c0008738>] (kernel_init+0x70/0xd8)
[<c00086c8>] (kernel_init+0x0/0xd8) from [<c00398e0>] (do_exit+0x0/0x6ac)

This patch restores the missing line'o'code.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Acked-by: NAndrew Victor <linux@maxim.org.za>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The baseband cpu owns the pmic, so voltage regulator control is only
available via a relatively limited interface through the proc_comm
transport.
Signed-off-by: NBrian Swetland <swetland@google.com>

San:
- Propagate DM errors to the originator of the request.
- Implement msm_dmov_stop_cmd()
- Add return value to init code
- Modify msm_dmov_stop_cmd() to support ungraceful flushing

Arve:
- Disable datamover interrupt when not in use.
  We turn off the interrrupt to allow power collapse from idle.
Signed-off-by: NSan Mehat <san@android.com>
Signed-off-by: NArve Hjønnevåg <arve@android.com>
Signed-off-by: NBrian Swetland <swetland@google.com>

Makes use of the proc_comm interface to provide clock control on
MSM7X01A family SoCs.
Signed-off-by: NBrian Swetland <swetland@google.com>

- Add some more peripherals (sdcc, etc) to the iomap.
- Remove virtual base addresses for devices that we should be passing
  physical addresses to drivers via resources and ioremap()ing.
- don't try to use uarts for ll debug once the mmu is enabled due to
  problems with the peripheral window
- make base addresses void __iomem * and fixup irq.c and timer.c
- Remove common.c and bring in devices.c/devices.h similar to
  the PXA architecture.
Signed-off-by: NBrian Swetland <swetland@google.com>

The proc_comm protocol is the lowest level protocol available for
communicating with the modem core.  It provides access to clock and
power control, among other things, and is safe for use from atomic
contexts, unlike the higher level SMD and RPC transports.
Signed-off-by: NBrian Swetland <swetland@google.com>

The MSM architecture covers a wider family of chips than just the MSM7X00A.
Move to a more generic name, in perparation for supporting the specific
SoC variants as sub-architectures (ARCH_MSM7X01A, ARCH_MSM722X, etc).  This
gives us ARCH_MSM for the (many) common peripherals.

This also removes the unused/obsolete config item MSM7X00A_IDLE.
Signed-off-by: NBrian Swetland <swetland@google.com>

Fix the edb7211_defconfig build errors.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch fixes the section mismatch warning from
sa1111.o at buildtime.

  CC      arch/arm/common/sa1111.o
  LD      arch/arm/common/built-in.o
  LD      vmlinux.o
  MODPOST vmlinux.o
WARNING: vmlinux.o(.text+0x87f4): Section mismatch in reference from the function sa1111_probe() to the function .devinit.text:sa1110_mb_enable()
The function sa1111_probe() references
the function __devinit sa1110_mb_enable().
This is often because sa1111_probe lacks a __devinit
annotation or the annotation of sa1110_mb_enable is wrong.
Signed-off-by: NKristoffer Ericson <kristoffer.ericson@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Hello,

	Introduced by:

commit fff14720
Author: Eric Miao <eric.miao@marvell.com>
Date:   Fri Sep 5 22:15:23 2008 +0800
Signed-off-by: NMariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: NEric Miao <eric.miao@marvell.com>

Recent changes have been made to use the generic SPI-based ads7846
touch screen driver and a generic SPI-based corgi-type LCD/backlight
driver. Update the {corgi,spitz}_defconfig to favor the use of these
drivers instead of the legacy ones.
Signed-off-by: NEric Miao <eric.miao@marvell.com>

Separate building of corgi_ssp.c, and introduce a new hidden config option
CONFIG_CORGI_SSP_DEPRECATED for this. Aslo mark corgi_ts.c and corgi_bl.c
as deprecated.

This unbreaks the legacy configs in {corgi,spitz}_defconfig, however, SPI
based ADS7846 touchscreen driver and a new SPI-based corgi_lcd.c driver
with integrated backlight support are recommended.
Signed-off-by: NEric Miao <eric.miao@marvell.com>

This reverts commit 68677ab3.

A smoother migration path would be making corgi_ts.c and other drivers
depending on corgi_ssp.c and corgi_lcd.c to depend on BROKEN instead,
and still allows those to exist around for some time.
Signed-off-by: NEric Miao <eric.miao@marvell.com>

Signed-off-by: NDmitry Baryshkov <dbaryshkov@gmail.com>

On Sharp SL-6000 lcd/backlight is a bit complex, so add two drivers
one for lcd-driving chip, other one for dac regulating the backlight
LEDS.
Signed-off-by: NDmitry Baryshkov <dbaryshkov@gmail.com>
Cc: Richard Purdie <rpurdie@rpsys.net>

__FUNCTION__ is gcc-specific, use __func__
Signed-off-by: NHarvey Harrison <harvey.harrison@gmail.com>
Acked-by: NRandy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

This patch implements a new freezer subsystem in the control groups
framework.  It provides a way to stop and resume execution of all tasks in
a cgroup by writing in the cgroup filesystem.

The freezer subsystem in the container filesystem defines a file named
freezer.state.  Writing "FROZEN" to the state file will freeze all tasks
in the cgroup.  Subsequently writing "RUNNING" will unfreeze the tasks in
the cgroup.  Reading will return the current state.

* Examples of usage :

   # mkdir /containers/freezer
   # mount -t cgroup -ofreezer freezer  /containers
   # mkdir /containers/0
   # echo $some_pid > /containers/0/tasks

to get status of the freezer subsystem :

   # cat /containers/0/freezer.state
   RUNNING

to freeze all tasks in the container :

   # echo FROZEN > /containers/0/freezer.state
   # cat /containers/0/freezer.state
   FREEZING
   # cat /containers/0/freezer.state
   FROZEN

to unfreeze all tasks in the container :

   # echo RUNNING > /containers/0/freezer.state
   # cat /containers/0/freezer.state
   RUNNING

This is the basic mechanism which should do the right thing for user space
task in a simple scenario.

It's important to note that freezing can be incomplete.  In that case we
return EBUSY.  This means that some tasks in the cgroup are busy doing
something that prevents us from completely freezing the cgroup at this
time.  After EBUSY, the cgroup will remain partially frozen -- reflected
by freezer.state reporting "FREEZING" when read.  The state will remain
"FREEZING" until one of these things happens:

	1) Userspace cancels the freezing operation by writing "RUNNING" to
		the freezer.state file
	2) Userspace retries the freezing operation by writing "FROZEN" to
		the freezer.state file (writing "FREEZING" is not legal
		and returns EIO)
	3) The tasks that blocked the cgroup from entering the "FROZEN"
		state disappear from the cgroup's set of tasks.

[akpm@linux-foundation.org: coding-style fixes]
[akpm@linux-foundation.org: export thaw_process]
Signed-off-by: NCedric Le Goater <clg@fr.ibm.com>
Signed-off-by: NMatt Helsley <matthltc@us.ibm.com>
Acked-by: NSerge E. Hallyn <serue@us.ibm.com>
Tested-by: NMatt Helsley <matthltc@us.ibm.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

As requested by Ian make state restore only if it's requested
by platform data: some platforms do correctly save the state of
the chip during suspend/resume, but some (like tosa) incorrectly
power off the chip at suspend, so the driver supports restoring
some bits of the tc6393xb state (not full, merely enough to support
resume on tosa). With this patch this code is disabled by default.
Signed-off-by: NDmitry Baryshkov <dbaryshkov@gmail.com>
Acked-by: NIan Molton <spyro@f2s.com>
Signed-off-by: NSamuel Ortiz <sameo@openedhand.com>

Instead of using bitfields for initial gpio setup,
provide generic setup/teardown hooks that can be used
to set the gpio states, register child devices, etc.
Signed-off-by: NDmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: NSamuel Ortiz <sameo@openedhand.com>

Commit 2ede90ca78500ca0ffeee19d7812d345f8ad152d adds 6183 support,
but the SPI support in there doesn't work since it depends on a
6183 SPI unit erratum fix that only just went upstream, via commit
2bec19fe.
Signed-off-by: NNicolas Pitre <nico@marvell.com>

This adds DSA switch instantiation hooks to the orion5x and the
kirkwood ARM SoC platform code, and instantiates the DSA switch
driver on the 88F5181L FXO RD, the 88F5181L GE RD, the 6183 AP GE
RD, the Linksys WRT350n v2, and the 88F6281 RD boards.
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
Tested-by: NNicolas Pitre <nico@marvell.com>
Tested-by: NPeter van Valderen <linux@ddcrew.com>
Tested-by: NDirk Teurlings <dirk@upexia.nl>
Signed-off-by: NNicolas Pitre <nico@marvell.com>

On the mv78xx0 development board, eth2 and eth3 do not have
corresponding PHYs, but are internally connected, as a way of
facilitating communication between the two CPU cores.  Since there are
no PHYs, we need to tell the network driver explicitly to force the
link on eth2 and eth3 up, to 1000 Mb/s full duplex.
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
Signed-off-by: NNicolas Pitre <nico@marvell.com>

Hello,

	Introduced by:

commit 642aa663
Author: J<C3><BC>rgen Schindele <linux@schindele.name>
Date:   Mon Aug 18 21:45:03 2008 +0100
Signed-off-by: NMariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Hello,

	Introduced by:

commit fff14720
Author: Eric Miao <eric.miao@marvell.com>
Date:   Fri Sep 5 22:15:23 2008 +0800
Signed-off-by: NMariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

It has been dead for more than 3 years and needs to be converted
to use platform PATA support anyway.

Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>

Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Rather than having everything that needs DMABOUNCE also select
ZONE_DMA, arrange for DMABOUNCE to select it instead.  This is
far more sensible.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

If period_cycles is 0, prescale becomes silly.
Signed-off-by: NRoel Kluin <roel.kluin@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

ARMv4 (ARM720T) cache flush functions are broken in 2.6.19+ kernels.
The issue was introduced by commit f12d0d7c
This patch corrects the CPU_CP15 ifdef statements so that they actually
do something.
Signed-off-by: NAnders Grafström <grfstrm@users.sourceforge.net>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>