- 02 6月, 2015 7 次提交
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由 Tero Kristo 提交于
The legacy support is wrong and dangerous, as it doesn't take any OPPs into account and does not scale voltages. Switching mpurate should be handled through cpufreq. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
This is no longer needed in platform directory, as the legacy clock data is gone, so move it under TI clock driver. Some static functions are renamed also. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
This only contains clksel tables that were used with the legacy clock data. Now that legacy clock data is completely gone, this file can be removed also. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
The clksel clock type is no longer used for anything, it is rather replaced with common clock divider code. Thus, remove the dead code from kernel. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
With the legacy clock support gone, the OMAP interface clock implementation can be moved under the clock driver. Some temporary header file tweaks are also needed to make this change work properly. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
With the legacy clock support gone, the OMAP4 specific DPLL implementations can be moved under the clock driver. Change some of the function prototypes to be static at the same time, and remove some exports from the global TI clock driver header. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
As most of the clock driver support code is going to be moved under drivers/clk/ti, an API for setting / getting the SoC specific clock features is needed. This patch provides this API and changes the existing code to use it. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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- 01 4月, 2015 1 次提交
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由 Tero Kristo 提交于
Some of the TI clock providers will be converted to use syscon, thus low-level regmap support is needed for the clock drivers also. This patch adds this support, which can be enabled for individual drivers in later patches. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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- 27 3月, 2015 1 次提交
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由 Tero Kristo 提交于
Splits the clock provider init out of the PRM driver and moves it to clock driver. This is needed so that once the PRCM drivers are separated, they can logically just access the clock driver not needing to go through common PRM code. This would be wrong in the case of control module for example. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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- 03 2月, 2015 2 次提交
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由 Michael Turquette 提交于
Remove omap_clocks_register and dummy_ck. The former is not used anymore now that the statically defined clk stuctures are replaced with proper descriptors and registered with the framework. The dummy clock in arch/arm/mach-omap2 is made redundant by the OMAP3+ clock data that migrated to drivers/clk. An additional benefit to this clean-up is removing the references to clk-private.h which will be removed. Cc: Paul Walmsley <paul@pwsan.com> Cc: Tero Kristo <t-kristo@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMichael Turquette <mturquette@linaro.org>
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由 Tomeu Vizoso 提交于
Moves clock state to struct clk_core, but takes care to change as little API as possible. struct clk_hw still has a pointer to a struct clk, which is the implementation's per-user clk instance, for backwards compatibility. The struct clk that clk_get_parent() returns isn't owned by the caller, but by the clock implementation, so the former shouldn't call clk_put() on it. Because some boards in mach-omap2 still register clocks statically, their clock registration had to be updated to take into account that the clock information is stored in struct clk_core now. Signed-off-by: NTomeu Vizoso <tomeu.vizoso@collabora.com> Reviewed-by: NStephen Boyd <sboyd@codeaurora.org> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMichael Turquette <mturquette@linaro.org> [mturquette@linaro.org: adapted clk_has_parent to struct clk_core applied OMAP3+ DPLL fix from Tero & Tony]
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- 08 1月, 2015 1 次提交
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由 Rickard Strandqvist 提交于
Remove the function omap4_dpllmx_gatectrl_read() that is not used anywhere. This was partially found by using a static code analysis program called cppcheck. Signed-off-by: NRickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 14 11月, 2014 1 次提交
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由 Tero Kristo 提交于
DPLL4 can't be reprogrammed on OMAP3430 ES1.0 due to hardware limitation. Currently, the code does runtime omap_rev() check to see the chip it is being executed on, instead, change this to use clk_features flags. This avoids need for runtime omap_rev() checks. Signed-off-by: NTero Kristo <t-kristo@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 12 11月, 2014 1 次提交
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由 Johan Hovold 提交于
Remove unused function prototype that was left by commit 149c09d3 ("ARM: AM33xx: remove old clock data and link in new clock init code") which removed the definition. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 16 7月, 2014 5 次提交
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由 Tero Kristo 提交于
Helps to get rid of some runtime cpu_is_x checks. This also allows eventual migration of the code under clock driver. Signed-off-by: NTero Kristo <t-kristo@ti.com> Reviewed-by: NMike Turquette <mturquette@linaro.org> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Tero Kristo 提交于
Currently DPLL code uses runtime cpu_is_343x checks to see if the DPLL has freqsel fields in its control register or not. Instead, add a new flag to the clk_features.flags and use this during runtime. Allows eventual move of the DPLL code under clock driver. Signed-off-by: NTero Kristo <t-kristo@ti.com> Reviewed-by: NMike Turquette <mturquette@linaro.org> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Tero Kristo 提交于
OMAP2 DPLL code for checking whether DPLL is in bypass mode now uses clk_features data provided during boot. This avoids the need to use cpu_is_X type checks runtime, and allows us to eventually move the clock code under the clock driver. Signed-off-by: NTero Kristo <t-kristo@ti.com> Reviewed-by: NMike Turquette <mturquette@linaro.org> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Tero Kristo 提交于
These are SoC specific and get their init values based on the SoC type. Previously the values were hard coded within the DPLL clock code, but having them inside the clock features avoids runtime cpu_is_X type checks. Signed-off-by: NTero Kristo <t-kristo@ti.com> Reviewed-by: NMike Turquette <mturquette@linaro.org> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Tero Kristo 提交于
This shall be used to replace the cpu type checks around the clock code. Actual bit values will be introduced in patches later. Signed-off-by: NTero Kristo <t-kristo@ti.com> Reviewed-by: NMike Turquette <mturquette@linaro.org> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 11 7月, 2014 1 次提交
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由 Tero Kristo 提交于
This clock type declaration is no longer used as all omap4+ SoC clock data has been moved to DT, thus remove it. Signed-off-by: NTero Kristo <t-kristo@ti.com> Reviewed-by: NMike Turquette <mturquette@linaro.org> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 02 7月, 2014 1 次提交
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由 Tero Kristo 提交于
Cleans up the code a bit and is useful for clock data DT conversion. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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- 28 5月, 2014 3 次提交
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由 Tero Kristo 提交于
OMAP2430 I2CHS modules require specific hardware ops to be used, so added a new compatible string for this. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
This patch adds support for omap2 type aplls, which have gating and autoidle functionality. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
OMAP2 has slightly different DPLL compared to later OMAP generations. This patch adds support for the ti,omap2-dpll-core-clock and also adds the bindings documentation. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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- 18 1月, 2014 6 次提交
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由 Tero Kristo 提交于
Using indexed memmaps is required for isolating the actual memory access from the clock code. Now, the driver providing the support for the clock IP block provides the low level routines for reading/writing clock registers also. Signed-off-by: NTero Kristo <t-kristo@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tero Kristo 提交于
OMAP3 has interface clocks in addition to functional clocks, which require special handling for the autoidle and idle status register offsets mainly. Signed-off-by: NTero Kristo <t-kristo@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tero Kristo 提交于
clk-33xx.c now contains the clock init functionality for am33xx, including DT clock registration and adding of static clkdev entries. This patch also moves the omap2_clk_enable_init_clocks declaration to the driver include, as this is needed by the am33xx clock init code. Signed-off-by: NTero Kristo <t-kristo@ti.com> Tested-by: NNishanth Menon <nm@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tero Kristo 提交于
clk-44xx.c now contains the clock init functionality for omap4, including DT clock registration and adding of static clkdev entries. Signed-off-by: NTero Kristo <t-kristo@ti.com> Tested-by: NNishanth Menon <nm@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tero Kristo 提交于
This is a multipurpose clock node, which contains support for multiple sub-clocks. Uses basic composite clock type to implement the actual functionality, and TI specific gate, mux and divider clocks. Signed-off-by: NTero Kristo <t-kristo@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tero Kristo 提交于
The OMAP clock driver now supports DPLL clock type. This patch also adds support for DT DPLL nodes. Signed-off-by: NTero Kristo <t-kristo@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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- 20 10月, 2013 1 次提交
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由 Tero Kristo 提交于
Some drivers require direct access to the autoidle functionality of the interface clocks. Added clock APIs for these, so that the drivers do not need to access CM registers directly. Signed-off-by: NTero Kristo <t-kristo@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 18 3月, 2013 1 次提交
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由 J Keerthy 提交于
The patch removes all the CK_* which were used to identify the family of processors for which the individual clocks belonged to. Instead now separate lists are created based on the family of processors. Boot Tested on: OMAP4430, OMAP4460, Beagle-board, AM33X boards, OMAP2 boards. Signed-off-by: NJ Keerthy <j-keerthy@ti.com> Tested-by: NVaibhav Bedia <vaibhav.bedia@ti.com> Tested-by: NJon Hunter <jon-hunter@ti.com> Cc: Paul Walmsley <paul@pwsan.com> [paul@pwsan.com: changed omap_clock_register_links() to omap_clocks_register(); updated to apply] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 01 2月, 2013 1 次提交
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由 Afzal Mohammed 提交于
DEFINE_STRUCT_CLK does not have the capability to set flags, define DEFINE_STRUCT_CLK_FLAGS to handle flags. This is needed to add SET_RATE_PARENT flag in statically defined lcd clock in am335x. Signed-off-by: NAfzal Mohammed <afzal@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 15 12月, 2012 1 次提交
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由 Jon Hunter 提交于
On OMAP4 devices, the ABE DPLL has an internal 4X multiplier that can be enabled or disabled in addition to the standard configurable multiplier (M) for OMAP DPLLs. When configuring the ABE DPLL the 4X multiplier is accounted for by checking to see whether it is enabled or not. However, when calculating a new rate we only check to see if the rate can be achieved with the current setting for the 4X multiplier. Enhance the round_rate() function for such DPLLs to see if the rate can be achieved with the 4X multiplier if it cannot be achieved without the 4X multiplier. This change is necessary, because when using the 32kHz clock as the source clock for the ABE DPLL, the default DPLL frequency for the ABE DPLL cannot be achieved without enabling the 4X multiplier. When using the 32kHz clock as the source clock for the ABE DPLL and attempting to lock the DPLL to 98.304MHz (default frequency), it was found that the DPLL would fail to lock if the low-power mode for the DPLL was not enabled. From reviewing boot-loader settings that configure the ABE DPLL it was found that the low-power mode is enabled when using the 32kHz clock source, however, the documentation for OMAP does not state that this is a requirement. Therefore, introduce a new function for OMAP4 devices to see if low-power mode can be enabled when calculating a new rate to ensure the DPLL will lock. New variables for the last calculated 4X multiplier and low-power setting have been added to the dpll data structure as well as variables defining the bit mask for enabling these features via the DPLL's control_reg. It is possible that we could eliminate these bit masks from the dpll data structure as these bit masks are not unique to OMAP4, if it is preferred. The function omap3_noncore_program_dpll() has been updated to avoid passing the calculated values for the multiplier (M) and divider (N) as these are stored in the clk structure. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 13 11月, 2012 6 次提交
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由 Mike Turquette 提交于
Clean all #ifdef's added to common clock code. This code is no longer needed due to migration to the common clock framework. Signed-off-by: NMike Turquette <mturquette@ti.com> [paul@pwsan.com: clean up new ifdefs added in clockdomain.c] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Rajendra Nayak 提交于
Clean all #ifdef's added to OMAP3 clock code to make it COMMON clk ready, not that CONFIG_COMMON_CLK is enabled. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NMike Turquette <mturquette@ti.com> [paul@pwsan.com: remove some ifdefs in mach-omap2/io.c] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Rajendra Nayak 提交于
This patch is output from updated omap hw data autogeneration scripts mostly contributed by Mike Turquette, with some later fixes from me. All data is added into a new cclock44xx_data.c file which will be switched with clock44xx_data.c file in a later patch. Signed-off-by: NRajendra Nayak <rnayak@ti.com> [paul@pwsan.com: replace omap2_init_clksel_parent() with omap2_clksel_find_parent_index(); reflowed macros; updated DEFINE_STRUCT_CLK_HW_OMAP macro to include clkdm_name; use macros for clksel mux+gate clocks; many other fixes] [mturquette@ti.com: converted DPLL outputs to HSDIVIDER macro; trace_clk_div_ck has clkdm ops] Signed-off-by: NMike Turquette <mturquette@ti.com> [paul@pwsan.com: fixed the omap-gpmc.fck alias per commit a2e5b90b; fixed several checkpatch issues; moved the dpll3xxx.c clockdomain modifications to another patch] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Paul Walmsley 提交于
Define four convenience macros to be used in the upcoming OMAP2+ common clock framework port. Although the use of these macros will make the data somewhat more difficult to read, they significantly reduce the number of lines in the output patch data. Most of these were created by Rajendra Nayak and Mike Turquette, as far as I know. Signed-off-by: NPaul Walmsley <paul@pwsan.com> [mturquette@ti.com: added DEFINE_CLK_OMAP_HSDIVIDER macro] Signed-off-by: NMike Turquette <mturquette@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Rajendra Nayak 提交于
Platform code can use omap2_clk_enable_init_clocks() to enable a list of clocks that are needed to be enabled at init. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NMike Turquette <mturquette@ti.com> [paul@pwsan.com: added kerneldoc to non-trivial new function] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Rajendra Nayak 提交于
Platforms can call omap2_init_clk_hw_omap_clocks() to register a clock using clk_hw_omap. omap2_clk_enable_autoidle_all() and omap2_clk_disable_autoidle_all() can then be used to run through all the clocks which support autoidle to enable/disable them. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NMike Turquette <mturquette@ti.com> [paul@pwsan.com: added kerneldoc on non-trivial new functions] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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