MMC_PM_KEEP_POWER doesn't imply MMC_PM_WAKE_SDIO_IRQ, we should only
enable device wake up when MMC_PM_WAKE_SDIO_IRQ is set. And "pm_flags"
is the requested pm features, we should not set it in the host driver.

At the same time, device wakeup is disabled by default, so there's no
need to disable device wakeup explicitly.

This patch fixes the warning as following:

[   64.616651] ------------[ cut here ]------------
[   64.616665] WARNING: CPU: 0 PID: 79 at linux/kernel/irq/manage.c:603 irq_set_irq_wake+0xf0/0x11c()
[   64.616667] Unbalanced IRQ 87 wake disable
Signed-off-by: NJisheng Zhang <jszhang@marvell.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

This eliminates having an #ifdef returning NULL for the case
when OF is disabled.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Acked-by: NJisheng Zhang <jszhang@marvell.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

According to erratum 'FE-2946959' both SDR50 and DDR50 modes require
specific clock adjustments in SDIO3 Configuration register.

This commit add the support of this register and for SDR50 or DDR50
mode use it as suggested by the erratum:
- Set the SDIO3 Clock Inv field in SDIO3 Configuration register to not
inverted.
- Set the Sample FeedBack Clock field to 0x1

[gregory.clement@free-electrons.com: port from 3.10]
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

According to erratum 'ERR-7878951' Armada 38x SDHCI controller has
different capabilities than the ones shown in its registers:

- it doesn't support the voltage switching: it can work either with
  3.3V or 1.8V supply
- it doesn't support the SDR104 mode
- SDR50 mode doesn't need tuning

The SDHCI_QUIRK_MISSING_CAPS quirk is used for updating the
capabilities accordingly.

[gregory.clement@free-electrons.com: port from 3.10]

Fixes: 5491ce3f ("mmc: sdhci-pxav3: add support for the Armada 38x SDHCI controller")
Cc: <stable@vger.kernel.org> # v3.15+
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

According to erratum 'FE-2946959' both SDR50 and DDR50 modes require
specific clock adjustments in SDIO3 Configuration register. However,
this register was not part of the device tree binding. Even if the
binding can (and will) be extended we still need handling the case
where this register was not available. In this case we use the
SDHCI_QUIRK_MISSING_CAPS quirk remove them from the capabilities.

This commit is based on the work done by Marcin Wojtas<mw@semihalf.com>

Fixes: 5491ce3f ("mmc: sdhci-pxav3: add support for the Armada 38x SDHCI controller")
Cc: <stable@vger.kernel.org> # v3.15+
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: NMarcin Wojtas <mw@semihalf.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Current code checks "clk_delay_cycles > 0" to know whether the optional
"mrvl,clk_delay_cycles" is set or not. But of_property_read_u32() doesn't
touch clk_delay_cycles if the property is not set. And type of
clk_delay_cycles is u32, so we may always set pdata->clk_delay_cycles as a
random value.

This patch fix this problem by check the return value of of_property_read_u32()
to know whether the optional clk-delay-cycles is set or not.
Signed-off-by: NJisheng Zhang <jszhang@marvell.com>
Cc: <stable@vger.kernel.org> # v3.6+
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

This patch is to fix a race condition that may cause an unhandled irq,
which results in big sdhci interrupt numbers and endless "mmc1: got irq
while runtime suspended" msgs before v3.15.

Consider following scenario:

      CPU0                            CPU1
                              sdhci_pxav3_runtime_suspend()
                               spin_lock_irqsave(&host->lock, flags);
 sdhci_irq()
  spining on the &host->lock
                               host->runtime_suspended = true;
                               spin_unlock_irqrestore(&host->lock, flags);
  get the &host->lock
  runtime_suspended is true now
  return IRQ_NONE;

Fix this race by using the core sdhci.c supplied sdhci_runtime_suspend_host()
in runtime suspend hook which will disable card interrupts. We also use the
sdhci_runtime_resume_host() in the runtime resume hook accordingly.
Signed-off-by: NJisheng Zhang <jszhang@marvell.com>
Cc: <stable@vger.kernel.org> # v3.9+
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Commit 63589e92 ("clk: Ignore error and NULL pointers passed to
clk_{unprepare, disable}()") allows NULL or error pointer to be passed
unconditionally.

This patch is to simplify probe error and remove code paths.

However, we reserve the core clock checks in runtime suspend/resume code
because we want a little smaller latency.
Signed-off-by: NJisheng Zhang <jszhang@marvell.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

This patch calls pm_runtime_put_noidle() to restore the device's usage
counter in the ->remove() implementation.
Signed-off-by: NJisheng Zhang <jszhang@marvell.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Commit 0dcaa249 ("sdhci-pxav3: Fix runtime PM initialization") tries
to fix one hang issue caused by calling sdhci_add_host() on a suspended
device. The fix enables the clock twice, once by clk_prepare_enable() and
another by pm_runtime_get_sync(), meaning that the clock will never be
gated at runtime PM suspend. I observed the power consumption regression on
Marvell BG2Q SoCs.

In fact, the fix is not correct. There still be a very small window
during which a runtime suspend might somehow occur after pm_runtime_enable()
but before pm_runtime_get_sync().

This patch fixes all of the two problems by just incrementing the usage
counter before pm_runtime_enable(). It also adjust the order of disabling
runtime pm and storing the usage count in the error path to handle clock
gating properly.
Signed-off-by: NJisheng Zhang <jszhang@marvell.com>
Cc: <stable@vger.kernel.org> # v3.11+
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

In commit 5491ce3f ("mmc: sdhci-pxav3: add support for the Armada
38x SDHCI controller"), the sdhci-pxav3 driver was extended to include
support for the SDHCI controller found in the Armada 38x
processor. This mainly involved adding some MBus window related
configuration.

However, this configuration is currently done too early in ->probe():
it is done before clocks are enabled, while this configuration
involves touching the registers of the controller, which will hang the
SoC if the clock is disabled. It wasn't noticed until now because the
bootloader typically leaves gatable clocks enabled, but in situations
where we have a deferred probe (due to a CD GPIO that cannot be taken,
for example), then the probe will be re-tried later, after a clock
disable has been done in the exit path of the failed probe attempt of
the device. This second probe() will hang the system due to the clock
being disabled.

This can for example be produced on Armada 385 GP, which has a CD GPIO
connected to an I2C PCA9555. If the driver for the PCA9555 is not
compiled into the kernel, then we will have the following sequence of
events:

  1. The SDHCI probes
  2. It does the MBus configuration (which works, because the clock is
     left enabled by the bootloader)
  3. It enables the clock
  4. It tries to get the CD GPIO, which fails due to the driver being
     missing, so -EPROBE_DEFER is returned.
  5. Before returning -EPROBE_DEFER, the driver cleans up what was
     done, which includes disabling the clock.
  6. Later on, the SDHCI probe is tried again.
  7. It does the MBus configuration, which hangs because the clock is
     no longer enabled.

This commit does the obvious fix of doing the MBus configuration after
the clock has been enabled by the driver.

Fixes: 5491ce3f ("mmc: sdhci-pxav3: add support for the Armada 38x SDHCI controller")
Cc: <stable@vger.kernel.org> # v3.15+
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

After commit b2b49ccb (PM: Kconfig: Set PM_RUNTIME if PM_SLEEP is
selected) PM_RUNTIME is always set if PM is set, so #ifdef blocks
depending on CONFIG_PM_RUNTIME may now be changed to depend on
CONFIG_PM.

Replace CONFIG_PM_RUNTIME with CONFIG_PM everywhere under
drivers/mmc/.
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: NUlf Hansson <ulf.hansson@linaro.org>

Besides the I/O clock, some PXAv3 SDHCI IP also requires a core clock to
be enabled. Add an optional core clock to the corresponding driver.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

With support for more than one clock, we'll need to distinguish between
the clock by name. Change clock probing to first try to get "io" clock
before falling back to unnamed clock.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

As we are using references to the I/O clock throughout the driver,
move it to the private data. Also, in preparation for core clock,
rename it to clk_io.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

NULL-checking a struct clk it not only wrong but also not required as
for PXAv3 driver the corresponding clock is mandatory. Remove the
checks from sdhci_pxav3_runtime_{suspend,resume}.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

clk_enable from struct sdhci_pxa is unused, remove it from the private
driver data.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

struct sdhci_pxa is only used in sdhci_pxa driver itself, so move it
there.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

commit bb8175a8
  ("mmc: sdhci: clarify DDR timing mode between SD-UHS and eMMC")
added MMC_DDR52 as eMMC's DDR mode to be distinguished from SD-UHS.

While the differentation may be useful, pxav3 SDHCI controller lacks
a corresponding check in its custom .set_uhs_signaling callback for
MMC_DDR52. This patch adds a new switch case for MMC_TIMING_MMC_DDR52
to MMC_TIMING_UHS_DDR50 case.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Commit 0dcaa249 improved error
handling of sdhci_add_host. However, "err_of_parse" and "err_cd_req"
should be placed after "pm_runtime_disable(&pdev->dev)".
Signed-off-by: NXiang Wang <wangx@marvell.com>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

.set_uhs_signaling field is currently initialised twice once to the
arch specific callback pxav3_set_uhs_signaling, and also to the generic
sdhci_set_uhs_signaling callback.

This means that uhs is currently broken for this platform currently, as pxav3
has some special constriants which means it can't use the generic callback.

This happened in
commit 96d7b78c ("mmc: sdhci: convert sdhci_set_uhs_signaling() into a library function")
commit a702c8ab ("mmc: host: split up sdhci-pxa, create sdhci-pxav3.c")'

Fix this and hopefully prevent it happening in the future by ensuring named
initialisers always follow the declaration order in the structure definition.
Signed-off-by: NPeter Griffin <peter.griffin@linaro.org>
Cc: <stable@vger.kernel.org> # v3.16+
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

This patch removes the superflous .owner field for drivers which
use the module_platform_driver API, as this is overriden in
platform_driver_register anyway.
Signed-off-by: NPeter Griffin <peter.griffin@linaro.org>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

This simplifies probe error and remove code paths.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Add sdhci_set_uhs_signaling() and always call the set_uhs_signaling
method.  This avoids quirks being added into sdhci_set_uhs_signaling().
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Tested-by: NMarkus Pargmann <mpa@pengutronix.de>
Tested-by: NStephen Warren <swarren@nvidia.com>
[Ulf Hansson] Resolved conflict
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Signed-off-by: NChris Ball <chris@printf.net>

The set_uhs_signaling() method gives the impression that it can fail,
but anything returned from the method is entirely ignored by the sdhci
driver.  So returning failure has no effect.

So, kill the idea that it's possible for this to return an error by
removing the returned value.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Tested-by: NMarkus Pargmann <mpa@pengutronix.de>
Tested-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Signed-off-by: NChris Ball <chris@printf.net>

Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Tested-by: NMarkus Pargmann <mpa@pengutronix.de>
Tested-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Signed-off-by: NChris Ball <chris@printf.net>

Rather than having platform_reset_enter/platform_reset_exit methods,
turn the core of the reset handling into a library function which
platforms can call at the appropriate moment in their (new) reset
method.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Tested-by: NMarkus Pargmann <mpa@pengutronix.de>
Tested-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Signed-off-by: NChris Ball <chris@printf.net>

Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Tested-by: NMarkus Pargmann <mpa@pengutronix.de>
Tested-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Signed-off-by: NChris Ball <chris@printf.net>

The SDHCI unit used on the Armada 380 and 385 Marvell SoC is similar
to the PXAv3 unit. The only difference is that on Armada 38x, the
PXAv3 unit accesses memory through MBus windows which must be
configured prior to using the device. Without this, DMA would not
work.

In order to achieve this, the sdhci-pxav3 driver is extended with an
additional compatible string "marvell,armada-380-sdhci". When this
compatible string is used, the MBus windows are initialized in a way
that is identical to what all other DMA-capable drivers for Marvell
EBU platforms do.
Signed-off-by: NMarcin Wojtas <mw@semihalf.com>
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NChris Ball <chris@printf.net>

Add a debounce parameter to the mmc_gpio_request_cd() function that
enables GPIO debouncing when set to a non-zero value. This can be used
by MMC host drivers to enable debouncing on the card detect signal.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Commit bb691ae4 breaks boot on OLPC
XO-4, it hangs somewhere inside sdhci_add_host.

When pm_runtime_set_autosuspend_delay() was being called, the device's
usage counter was 0, causing the PM layer to runtime-suspend the
device.  We then went on to call sdhci_add_host() on a suspended
device, which hung.

Fix this by making the driver consistent with the omap_hsmmc driver,
both in terms of runtime PM initialization and error handling. Now
the device is not runtime-suspended until we exit the probe routine.
Signed-off-by: NDaniel Drake <dsd@laptop.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

Signed-off-by: NSimon Baatz <gmbnomis@gmail.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Add a param to allow users of sdhci_pltfm to allocate private space
in calls to sdhci_pltfm_init+sdhci_pltfm_register. This is implemented
in the same way as sdhci does for its users.
 None of the users have been migrated yet and are passing in zero to
retain their private allocation.

- todo: migrate clients to using allocation this way
- todo: remove priv variable once migration is complete

Also removed unused variable in sdhci_pltfm_init fn
Signed-off-by: NChristian Daudt <csd@broadcom.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Reviewed-by: NUlf Hansson <ulf.hansson@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

The driver core clears the driver data to NULL after device_release
or on probe failure, since commit 0998d063
(device-core: Ensure drvdata = NULL when no driver is bound).
Thus, it is not needed to manually clear the device driver data to NULL.
Signed-off-by: NJingoo Han <jg1.han@samsung.com>
Acked-by: NSonic Zhang <sonic.zhang@analog.com>
Acked-by: NSeungwon Jeon <tgih.jun@samsung.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NAdrian Hunter <adrian.hunter@intel.com>
Acked-by: NHaojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: NJaehoon Chung <jh80.chung@samsung.com>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
Acked-by: NTony Prisk <linux@prisktech.co.nz>
Signed-off-by: NChris Ball <cjb@laptop.org>

sdhci-pxav3 host controller used SDCLK for data timeout.
Signed-off-by: NKevin Liu <kliu5@marvell.com>
Acked-by: NHaojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

1. seperate device tree parsing from platform data handling which
   can make further work easy when platform data can be removed.

2. add calling mmc_of_parse which can parse more of property and
   pxav3_get_mmc_pdata can be shrinked a lot.
Signed-off-by: NKevin Liu <kliu5@marvell.com>
Acked-by: NHaojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Flag PXA_FLAG_CARD_PERMANENT is set in sdhci_pxa_platdata flags to
indicate that the card is always wired to host, like on-chip emmc,
which is permanently present and don't need detection.

So only MMC_CAP_NONREMOVABLE should be set for this case. But current
code also sets SDHCI_QUIRK_BROKEN_CARD_DETECTION, which doesn't make
sense.
Signed-off-by: NKevin Liu <kliu5@marvell.com>
Acked-by: NHaojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

sdhci_pltfm_init can set host->ops and host->quirks if sdhci_pltfm_data
is transfered as arguments. Then no need to set them manually in
sdhci_pxav3_probe.
Signed-off-by: NKevin Liu <kliu5@marvell.com>
Acked-by: NHaojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Basically all drivers can have sdhci_ops struct const, but almost none do.
This patch constifies all sdhci_ops struct declarations where possible.

The patch was auto-generated with the following coccinelle semantic patch:

// <smpl>
@r1@
identifier ops;
identifier fld;
@@
ops.fld = ...;

@disable optional_qualifier@
identifier ops != r1.ops;
@@
static
+const
struct sdhci_ops ops = { ... };
// </smpl>
Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

Signed-off-by: NKevin Liu <kliu5@marvell.com>
Signed-off-by: NJialing Fu <jlfu@marvell.com>
Signed-off-by: NChris Ball <cjb@laptop.org>