1. 05 8月, 2015 1 次提交
  2. 04 5月, 2015 1 次提交
  3. 18 3月, 2015 1 次提交
  4. 16 3月, 2015 1 次提交
  5. 14 1月, 2015 3 次提交
  6. 22 12月, 2014 2 次提交
  7. 06 12月, 2014 1 次提交
  8. 17 11月, 2014 2 次提交
  9. 29 9月, 2014 1 次提交
    • A
      dma: imx-sdma: fix another incorrect __init annotation · fe6cf289
      Arnd Bergmann 提交于
      In e34b731f ("dma: imx-sdma: Remove spurious __init annotation on
      sdma_probe()"), Mark found an extraneous __init label and fixed it.
      
      However, he missed another one, because now we get this other warning:
      
      WARNING: drivers/dma/imx-sdma.o(.text+0x3bb4): Section mismatch in reference from the function sdma_probe() to the function .init.text:sdma_get_firmware()
      The function sdma_probe() references
      the function __init sdma_get_firmware().
      
      Same reasoning as the last time, the function may get called at
      runtime, so it can't be __init.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NVinod Koul <vinod.koul@intel.com>
      fe6cf289
  10. 28 8月, 2014 1 次提交
  11. 19 8月, 2014 2 次提交
  12. 04 8月, 2014 1 次提交
  13. 25 7月, 2014 2 次提交
  14. 15 7月, 2014 1 次提交
  15. 01 7月, 2014 1 次提交
    • R
      Update imx-sdma cyclic handling to report residue · d1a792f3
      Russell King - ARM Linux 提交于
      I received a report this morning from one of the Novena developers that
      the behaviour of the iMX6 ASoC codec driver (using imx-pcm-dma.c) was
      sub-optimal under high system load.
      
      While there are issues relating to system load remaining, upon reviewing
      the ASoC imx-pcm-dma.c driver, it was noticed that it not using the
      residue support, because SDMA doesn't support it.  This has the effect
      that SDMA has to make multiple calls into the ASoC and ALSA code, one
      for each period.
      
      Since ALSA's snd_pcm_elapsed() does not need to be called multiple times
      and it is entirely sufficient to call it once to update ALSA with the
      current buffer position via the pointer method, we can do better here.
      We can also avoid stopping the DMA entirely, just like real cyclic DMA
      implementations behave.  While this means that we replay some old samples,
      this is a nicer behaviour than having audio stop and restart.
      
      The changes to achieve this are relatively minor - imx-sdma.c can track
      where the DMA is to the nearest descriptor boundary - it does this
      already when deciding how many callbacks to issue.  In doing this,
      buf_tail always points at the descriptor which will complete next.
      
      The residue is defined by the bytes remaining to the end of the buffer,
      when the buffer is viewed as a single block of memory [start...end].
      So, when we start out, there's a full buffer worth of residue, and this
      counts down as we approach the end of the buffer, eventually becoming
      zero at the end, before returning to the full buffer worth when we
      wrap back to the start.
      
      Moving the walking of the descriptors into the interrupt handler means
      that we can update the BD_DONE flag at interrupt time, thus avoiding
      a delayed tasklet stopping the cyclic DMA.
      
      This means that the residue can be calculated from (total descriptors -
      buf_tail) * descriptor size.  This is what the change below does.  We
      update imx-pcm-dma.c to remove the NO_RESIDUE flag since we now provide
      the residue.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      Tested-by: NShawn Guo <shawn.guo@linaro.org>
      Signed-off-by: NVinod Koul <vinod.koul@intel.com>
      d1a792f3
  16. 02 6月, 2014 1 次提交
    • J
      dmaengine: imx: correct sdmac->status for cyclic dma tx · ffe59b29
      Jiada Wang 提交于
      In cyclic dma tx's handler sdma_handle_channel_loop(),
      SDMA channel statue is set to either DMA_ERROR or DMA_IN_PROGRESS
      based on each period's status. This has the following issues:
      
      1) If one period's status is BD_RROR, then channel status
         will be set to DMA_ERROR, but it will be overwritten to DMA_IN_PROGRESS
         if the following periods are OK.
      2) DMA client may call sdma_control(DMA_TERMINATE_ALL) to stop the cyclic dma
         operation, sdma channel status will be set to DMA_ERROR,
         but if after this handler is called, then again the channel status will be overwritten
         to DMA_IN_PROGRESS. Then the following dmaengine_prep_dma_cyclic() will always fail,
         as channel status is DMA_IN_PROGRESS.
      
      As in cyclic dma tx, channel status will be initially set to DMA_IN_PROGRESS,
      driver only needs to change it to DMA_ERROR, when something wrong happens
      (one period status is wrong, or stoped by client explicitly).
      Signed-off-by: NJiada Wang <jiada_wang@mentor.com>
      Signed-off-by: NVinod Koul <vinod.koul@intel.com>
      ffe59b29
  17. 18 2月, 2014 1 次提交
  18. 13 1月, 2014 1 次提交
  19. 16 12月, 2013 2 次提交
  20. 13 11月, 2013 1 次提交
  21. 31 10月, 2013 1 次提交
  22. 25 10月, 2013 1 次提交
  23. 02 9月, 2013 1 次提交
    • F
      dma: imx-sdma: Staticize sdma_driver_data structures · e9fd58de
      Fabio Estevam 提交于
      Sparse report the following warnings:
      
      drivers/dma/imx-sdma.c:330:25: warning: symbol 'sdma_imx31' was not declared. Should it be static?
      drivers/dma/imx-sdma.c:351:25: warning: symbol 'sdma_imx25' was not declared. Should it be static?
      drivers/dma/imx-sdma.c:357:25: warning: symbol 'sdma_imx35' was not declared. Should it be static?
      drivers/dma/imx-sdma.c:375:25: warning: symbol 'sdma_imx51' was not declared. Should it be static?
      drivers/dma/imx-sdma.c:395:25: warning: symbol 'sdma_imx53' was not declared. Should it be static?
      drivers/dma/imx-sdma.c:414:25: warning: symbol 'sdma_imx6q' was not declared. Should it be static?
      
      Make the sdma_driver_data structures static.
      Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
      Signed-off-by: NVinod Koul <vinod.koul@intel.com>
      e9fd58de
  24. 26 8月, 2013 2 次提交
  25. 19 8月, 2013 1 次提交
  26. 13 8月, 2013 1 次提交
  27. 05 8月, 2013 1 次提交
  28. 05 7月, 2013 1 次提交
  29. 15 4月, 2013 1 次提交
  30. 15 10月, 2012 1 次提交
  31. 22 9月, 2012 1 次提交
  32. 14 9月, 2012 1 次提交