- 22 11月, 2012 3 次提交
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由 Sascha Hauer 提交于
Now that the additional enable bits in the enet PLL are handled as gates, the gate_mask is identical for all plls. Remove the gate_mask from the code and use the BM_PLL_ENABLE bit for enabling/disabling the PLL. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NShawn Guo <shawn.guo@linaro.org>
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由 Sascha Hauer 提交于
In current code the ethernet PLL is not handled correctly. The PLL runs at 500MHz and has different outputs. Only the enet reference clock is implemented. This patch changes the PLL so that it outputs 500MHz and adds the additional outputs as dividers. This now matches the datasheet which says: > This PLL synthesizes a low jitter clock from 24 MHz reference clock. > The PLL outputs a 500 MHz clock. The reference clocks generated by this PLL are: > • Ref_PCIe = 125 MHz > • Ref_SATA = 100 MHz > • Ref_ethernet, which is configurable based on the PLL_ENET[1:0] register field. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NShawn Guo <shawn.guo@linaro.org>
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由 Sascha Hauer 提交于
In recent reference manuals the PLLs were renumbered. PLL8 now is PLL6 and vice versa. Change the code according to the reference manual to avoid confusion. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NShawn Guo <shawn.guo@linaro.org>
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- 16 11月, 2012 2 次提交
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由 Steffen Trumtrar 提交于
This adds the mmdc_ch1 as a possible parent for the ldb_di clk. According to the datasheet, this clock can be selected at this mux. Signed-off-by: NSteffen Trumtrar <s.trumtrar@pengutronix.de> Acked-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
It enables cpufreq support for imx6q with generic cpufreq-cpu0 driver. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 15 10月, 2012 1 次提交
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由 Shawn Guo 提交于
Rename mach-imx/include/mach/common.h to mach-imx/common.h and update all users to include common.h rather than mach/common.h. It also removes an unneeded inclusion to common.h in mach-imx/devices/devices.c. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NArnd Bergmann <arnd@arndb.de>
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- 19 9月, 2012 1 次提交
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由 Huang Shijie 提交于
The gpmi-nand driver can support the ONFI nand chip's EDO (extra data out) mode in the asynchrounous mode. In the asynchrounous mode 5, the gpmi needs 100MHz clock for the IO. But with the pll2_pfd0_352m, we can not get the 100MHz clock. So choose pll2_pfd2_396m as enfc_sel's parent. Signed-off-by: NHuang Shijie <b32955@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 11 9月, 2012 1 次提交
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由 Shawn Guo 提交于
It really becomes an maintenance issue that every time a device needs to look up (clk_get) a clock we have to patch kernel clock file to call clk_register_clkdev for that clock. Since clock DT support which is meant to resolve clock lookup in device tree is in place, the patch moves imx6q client devices' clock lookup over to device tree, so that any new lookup to be added at later time can just get done in DT instead of kernel. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 17 8月, 2012 1 次提交
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由 Philipp Zabel 提交于
The ldb_di[01]_podf is implemented as a clk-divider that divides by 1 or 2. In reality, the ldb_di[01]_ipu_div dividers divide by either 3.5 or 7. Adding a fixed factor of 1/3.5 fixes their children's clock rates. This should probably be converted to rate table based dividers, once available. Cc: <stable@vger.kernel.org> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NSteffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 12 7月, 2012 2 次提交
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由 Richard Zhao 提交于
Signed-off-by: NRichard Zhao <richard.zhao@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Richard Zhao 提交于
Signed-off-by: NRichard Zhao <richard.zhao@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 03 7月, 2012 1 次提交
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由 Huang Shijie 提交于
Add clocks for gpmi-nand. Signed-off-by: NHuang Shijie <shijie8@gmail.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 02 7月, 2012 2 次提交
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由 Shawn Guo 提交于
There are a number of clkdev lookups left over from commit b0286f20 (ARM: imx6q: prepare and enable init on clks directly instead of clk_get first), remove them since they are not needed now. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Huang Shijie 提交于
add clock for apbh-dma. Signed-off-by: NHuang Shijie <shijie8@gmail.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 01 7月, 2012 1 次提交
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由 Shawn Guo 提交于
When moving to common clk framework, the imx6q clks rom and mmdc_ch1_axi get different on/off states than old clk driver, which breaks suspend function. There might be a better way to manage these clocks, but let's takes the old clk driver approach to fix the regression first. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 16 5月, 2012 2 次提交
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由 Richard Zhao 提交于
This also removes the usboh3 clk from the initially turned on clocks which leaked in from an internal development tree. Signed-off-by: NRichard Zhao <richard.zhao@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Sascha Hauer 提交于
As the timer code now does a clk_get to get its clock we don't need the struct clk argument anymore. This also changes the alternative EPIT timer to do a clk_get. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 11 5月, 2012 3 次提交
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由 Richard Zhao 提交于
Signed-off-by: NRichard Zhao <richard.zhao@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Richard Zhao 提交于
It's used by audio drivers. Signed-off-by: NRichard Zhao <richard.zhao@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
It has been pointed out by device tree maintainer for several times that the generic names 'serial' and 'ethernet' should be used for those devices per ePAPR. Renames imx uart and fec device tree nodes to stop them being bad examples. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 09 5月, 2012 1 次提交
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由 Shawn Guo 提交于
Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
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