Mainstone has the primary I2C bus exposed for use on plugin modules.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Neric miao <eric.y.miao@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch implements support for Gumstix-F flash, udc and mci. Fixes since the last time are:
- Steve Sakoman as maintainer
- cleanup for udc and mci setup
Signed-off-by: NJaya Kumar <jayakumar.lkml@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This is partial because mainstone's keypad is really special, some of
the keys like '1', '2', ... are actually connected to two row/column
juntions, thus pressing '1' is equivalent to pressing 'A' & 'H'.

This is really brain damanged since it makes distinguishing between
pressing '1' and multiple keys pressing of 'A' & 'H' difficult.

So these special keys are not supported for the time being.
Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

also update the clk definitions in pxa27x and pxa3xx.
Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

NOTE: currently don't know if the key code of KEY_SUSPEND is fit for
such usage.
Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Changes include:

1. rename MFP_LPM_WAKEUP_ENABLE into MFP_LPM_CAN_WAKEUP to indicate
   the board capability of this pin to wakeup the system

2. add gpio_set_wake() and keypad_set_wake() to allow dynamically
   enable/disable wakeup from GPIOs and keypad GPIO

   * these functions are currently kept in mfp-pxa2xx.c due to their
     dependency to the MFP configuration

3. pxa2xx_mfp_config() only gives early warning if MFP_LPM_CAN_WAKEUP
   is set on incorrect pins

So that the GPIO's wakeup capability is now decided by the following:

   a) processor's capability: (only those GPIOs which have dedicated
      bits within PWER/PRER/PFER can wakeup the system), this is
      initialized by pxa{25x,27x}_init_mfp()

   b) board design decides:
      - whether the pin is designed to wakeup the system (some of
        the GPIOs are configured as other functions, which is not
        intended to be a wakeup source), by OR'ing the pin config
        with MFP_LPM_CAN_WAKEUP

      - which edge the pin is designed to wakeup the system, this
        may depends on external peripherals/connections, which is
        totally board specific; this is indicated by MFP_LPM_EDGE_*

   c) the corresponding device's (most likely the gpio_keys.c) wakeup
      attribute:
Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

1. the following code to configure PGSRx is no way portable and
   intuitive:

-	PGSR0 = 0x00008800;
-       PGSR1 = 0x00000002;
-       PGSR2 = 0x0001FC00;
-       PGSR3 = 0x00001F81;

   this is removed as low power state has already been encoded in
   the pin configuration definitions.

   Note: there is no specific reason for some of the GPIOs to drive
   high in low power mode as indicated by the above setting, those
   bits are ignored, and the result is validated to work.

2. the following code to configure GPIO wakeup is removed as this
   is now totally handled by pxa2xx_mfp_config():

-       PWER  = 0xC0000002;
-       PRER  = 0x00000002;
-       PFER  = 0x00000002;
Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

for use by other platforms
Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Pin configuration on pxa{25x,27x} has now separated from generic GPIO
into dedicated mfp-pxa2xx.c by this patch. The name "mfp" is borrowed
from pxa3xx and is used here to alert the difference between the two
concepts: pin configuration and generic GPIOs.  A GPIO can be called
a "GPIO" _only_ when the corresponding pin is configured so.

A pin configuration on pxa{25x,27x} is composed of:

    - alternate function selection (or pin mux as commonly called)
    - low power state or sleep state
    - wakeup enabling from low power mode

The following MFP_xxx bit definitions in mfp.h are re-used:

    - MFP_PIN(x)
    - MFP_AFx
    - MFP_LPM_DRIVE_{LOW, HIGH}
    - MFP_LPM_EDGE_*

Selecting alternate function on pxa{25x, 27x} involves configuration
of GPIO direction register GPDRx, so a new bit and MFP_DIR_{IN, OUT}
are introduced. And pin configurations are defined by the following
two macros:

    - MFP_CFG_IN  : for input alternate functions
    - MFP_CFG_OUT : for output alternate functions

Every configuration should provide a low power state if it configured
as output using MFP_CFG_OUT().  As a general guideline, the low power
state should be decided to minimize the overall power dissipation. As
an example, it is better to drive the pin as high level in low power
mode if the GPIO is configured as an active low chip select.

Pins configured as GPIO are defined by MFP_CFG_IN(). This is to avoid
side effects when it is firstly configured as output.  The actual
direction of the GPIO is configured by gpio_direction_{input, output}

Wakeup enabling on pxa{25x, 27x} is actually GPIO based wakeup, thus
the device based enable_irq_wake() mechanism is not applicable here.

E.g.  invoking enable_irq_wake() with a GPIO IRQ as in the following
code to enable OTG wakeup is by no means portable and intuitive, and
it is valid _only_ when GPIO35 is configured as USB_P2_1:

    enable_irq_wake( gpio_to_irq(35) );

To make things worse, not every GPIO is able to wakeup the system.
Only a small number of them can, on either rising or falling edge,
or when level is high (for keypad GPIOs).

Thus, another new bit is introduced to indicate that the GPIO will
wakeup the system:

    - MFP_LPM_WAKEUP_ENABLE

The following macros can be used in platform code, and be OR'ed to
the GPIO configuration to enable its wakeup:

    - WAKEUP_ON_EDGE_{RISE, FALL, BOTH}
    - WAKEUP_ON_LEVEL_HIGH

The WAKEUP_ON_LEVEL_HIGH is used for keypad GPIOs _only_, there is
no edge settings for those GPIOs.

These WAKEUP_ON_* flags OR'ed on wrong GPIOs will be ignored in case
that platform code author is careless enough.

The tradeoff here is that the wakeup source is fully determined by
the platform configuration, instead of enable_irq_wake().
Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

two reasons:
1. GPIO namings and their mode definitions are conceptually not part
   of the PXA register definitions

2. this is actually a temporary move in the transition of PXA2xx to
   use MFP-alike APIs (as what PXA3xx is now doing), so that legacy
   code will still work and new code can be added in step by step
Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

MFP configurations after resume should be done before the GPIO registers
are restored.  Move the mfp sysdev registeration to the same place where
GPIO and IRQ sysdev(s) are registered to better control the order.
Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The main issue here is that pxa3xx does not have GAFRx registers,
access directly to these registers should be avoided for pxa3xx:

1. introduce __gpio_is_occupied() to indicate the GAFRx and GPDRx
   registers are already configured on pxa{25x,27x} while returns
   0 always on pxa3xx

2. pxa_gpio_mode(gpio | GPIO_IN) is replaced directly with assign-
   ment of GPDRx, the side effect of this change is that the pin
   _must_ be configured before use, pxa_gpio_irq_type() will not
   change the pin to GPIO, as this restriction is sane, esp. with
   the new MFP framework
Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

To further clean up the GPIO and IRQ structure:

1. pxa_init_irq_gpio() and pxa_init_gpio() combines into a single
   function pxa_init_gpio()

2. assignment of set_wake merged into pxa_init_{irq,gpio}() as
   an argument
Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This makes the code better organized and simplified a bit.  The change
will lose a bit of performance when performing IRQ ack/mask/unmask,but
that's not too much after checking the result binary.

This patch also removes the ugly #ifdef CONFIG_PXA27x .. #endif by
carefully not to access those pxa{27x,3xx} specific registers, this
is done by keeping an internal IRQ number variable.  The pxa-regs.h
is also modified so registers for IRQ > PXA_IRQ(31) are made public
even if CONFIG_PXA{27x,3xx} isn't defined (for pxa25x's sake)

The incorrect assumption in the original code that internal irq starts
from 0 is also corrected by comparing with PXA_IRQ(0).

"struct sys_device" for the IRQ are reduced into one single device on
pxa{27x,3xx}.
Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

by

1. wrapping long lines and making comments tidy

2. using IRQ_TYPE_* instead of migration macros __IRQT_*

3. introduce a pr_debug() for the commented printk(KERN_DEBUG ...)
   stuff
Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

by:

1. introduce dedicated pxa_{mask,unmask}_low_gpio()

2. remove set_irq_chip(IRQ_GPIO_2_x, ...) which has already been
   initialized in pxa_init_irq()

3. introduce dedicated pxa_init_gpio_set_wake()
Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

1. As David Brownell suggests, using ffs() is going to make the loop
   a bit faster (by avoiding unnecessary shift and iteration)

2. Russell suggested find_{first,next}_bit() being used with the
   gedr[] array
Signed-off-by: Neric miao <eric.miao@marvell.com>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The AC97 clock rate on PXA3xx is generated with a configurable divider
from sys_pll.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Expose control of the PXA3xx 13MHz CLK_POUT pin via the clock API
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

__FUNCTION__ is gcc-specific, use __func__
Signed-off-by: NHarvey Harrison <harvey.harrison@gmail.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This is unnecessary since it is already protected by
spin_lock_irq{save, restore} in clock.c.
Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Convert debug-only (and removed) MODULE_PARM() to module_param().
Compiles cleanly (with DEBUG=1).
Signed-off-by: NRandy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The .get method is needed for suspend/resume. Otherwise you
get this in dmesg:

cpufreq: suspend failed to assert current frequency is what timing core thinks it is.
cpufreq: resume failed to assert current frequency is what timing core thinks it is.
Signed-off-by: NHolger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Ensure that the clock lookup always finds an entry for a specific
device and ID before it falls back to finding just by ID.  This
fixes a problem reported by Holger Schurig where the BTUART was
assigned the wrong clock.
Tested-by: NHolger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

According to PXA300/310 and PXA320 Developer manuals,
the ASCR[RDH] "bit needs to be cleared as part of the software
initialization coming out of any reset and coming out of D3".
The latter requirement is addressed by commit
"c4d1fb62", as for the former (coming out of any reset),
the kernel relies on boot loaders and assumes that RDH bit
is cleared there. Though, not all bootloaders follow the rule
so we have to clear the bit in kernel.

We clear the RDH bit in pxa3xx_init() function since
it is always invoked after any reset. We also preserve D1S, D2S
and D3S bits from being cleared in case we invoke pxa3xx_init()
function not from normal hardware reset (e.g. kexec scenario),
so these bits can be properly referenced later.
Signed-off-by: NDmitry Krivoschekov <dmitry.krivoschekov@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This adds gpiolib support for the PXA architecture:
  - move all GPIO API functions from generic.c into gpio.c
  - convert the gpio_get/set_value macros into inline functions

This makes it easier to hook up GPIOs provided by external chips like
ASICs and CPLDs.
Signed-off-by: NPhilipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Cc: Jean Delvare <khali@linux-fr.org>
Cc: Eric Miao <eric.miao@marvell.com>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: Haavard Skinnemoen <hskinnemoen@atmel.com>
Cc: Ben Gardner <bgardner@wabtec.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
[ Minor ARM fixup from David Brownell folded into this ]
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

This patch adds a PXA2xx specific header file to control chip setup.
Without, the PCM027 BSP can't be built.
Signed-off-by: NRobert Schwebel <r.schwebel@pengutronix.de>
Signed-off-by: NJuergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The is caused by the patch below:

  [ARM] 4737/1: Refactor corgi_lcd to improve readability + bugfix

It renamed the confusing get_hsync_len() to get_hsync_invperiod(), which
unfortunately leaves poodle.c un-modified.
Signed-off-by: Neric miao <eric.miao@marvell.com>
Acked-by: NRichard Purdie <rpurdie@rpsys.net>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Some machines are missing "pxa2xx-regs.h" due to the following patch:

  [ARM] pxa: move memory controller registers into pxa2xx-regs.h

This patch fixes the issue by including the pxa2xx-regs.h where necessary.
Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Introduce a sysdev for pxa3xx static memory controller, mainly
for register saving/restoring in PM
Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>