1. 21 7月, 2015 5 次提交
    • A
      KVM: arm64: enable KVM_CAP_SET_GUEST_DEBUG · 834bf887
      Alex Bennée 提交于
      Finally advertise the KVM capability for SET_GUEST_DEBUG. Once arm
      support is added this check can be moved to the common
      kvm_vm_ioctl_check_extension() code.
      Signed-off-by: NAlex Bennée <alex.bennee@linaro.org>
      Acked-by: NChristoffer Dall <christoffer.dall@linaro.org>
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      834bf887
    • A
      KVM: arm64: introduce vcpu->arch.debug_ptr · 84e690bf
      Alex Bennée 提交于
      This introduces a level of indirection for the debug registers. Instead
      of using the sys_regs[] directly we store registers in a structure in
      the vcpu. The new kvm_arm_reset_debug_ptr() sets the debug ptr to the
      guest context.
      
      Because we no longer give the sys_regs offset for the sys_reg_desc->reg
      field, but instead the index into a debug-specific struct we need to
      add a number of additional trap functions for each register. Also as the
      generic generic user-space access code no longer works we have
      introduced a new pair of function pointers to the sys_reg_desc structure
      to override the generic code when needed.
      Reviewed-by: NChristoffer Dall <christoffer.dall@linaro.org>
      Signed-off-by: NAlex Bennée <alex.bennee@linaro.org>
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      84e690bf
    • A
      KVM: arm64: guest debug, add support for single-step · 337b99bf
      Alex Bennée 提交于
      This adds support for single-stepping the guest. To do this we need to
      manipulate the guests PSTATE.SS and MDSCR_EL1.SS bits to trigger
      stepping. We take care to preserve MDSCR_EL1 and trap access to it to
      ensure we don't affect the apparent state of the guest.
      
      As we have to enable trapping of all software debug exceptions we
      suppress the ability of the guest to single-step itself. If we didn't we
      would have to deal with the exception arriving while the guest was in
      kernelspace when the guest is expecting to single-step userspace. This
      is something we don't want to unwind in the kernel. Once the host is no
      longer debugging the guest its ability to single-step userspace is
      restored.
      Signed-off-by: NAlex Bennée <alex.bennee@linaro.org>
      Reviewed-by: NChristoffer Dall <christoffer.dall@linaro.org>
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      337b99bf
    • A
      KVM: arm64: guest debug, add SW break point support · 4bd611ca
      Alex Bennée 提交于
      This adds support for SW breakpoints inserted by userspace.
      
      We do this by trapping all guest software debug exceptions to the
      hypervisor (MDCR_EL2.TDE). The exit handler sets an exit reason of
      KVM_EXIT_DEBUG with the kvm_debug_exit_arch structure holding the
      exception syndrome information.
      
      It will be up to userspace to extract the PC (via GET_ONE_REG) and
      determine if the debug event was for a breakpoint it inserted. If not
      userspace will need to re-inject the correct exception restart the
      hypervisor to deliver the debug exception to the guest.
      
      Any other guest software debug exception (e.g. single step or HW
      assisted breakpoints) will cause an error and the VM to be killed. This
      is addressed by later patches which add support for the other debug
      types.
      Signed-off-by: NAlex Bennée <alex.bennee@linaro.org>
      Reviewed-by: NChristoffer Dall <christoffer.dall@linaro.org>
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      4bd611ca
    • A
      KVM: arm: introduce kvm_arm_init/setup/clear_debug · 56c7f5e7
      Alex Bennée 提交于
      This is a precursor for later patches which will need to do more to
      setup debug state before entering the hyp.S switch code. The existing
      functionality for setting mdcr_el2 has been moved out of hyp.S and now
      uses the value kept in vcpu->arch.mdcr_el2.
      
      As the assembler used to previously mask and preserve MDCR_EL2.HPMN I've
      had to add a mechanism to save the value of mdcr_el2 as a per-cpu
      variable during the initialisation code. The kernel never sets this
      number so we are assuming the bootcode has set up the correct value
      here.
      
      This also moves the conditional setting of the TDA bit from the hyp code
      into the C code which is currently used for the lazy debug register
      context switch code.
      Signed-off-by: NAlex Bennée <alex.bennee@linaro.org>
      Reviewed-by: NChristoffer Dall <christoffer.dall@linaro.org>
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      56c7f5e7