For most platforms, the CPU and ESAI device is in the same endianess
mode. While for the LS1 platform, the CPU is in LE mode and the ESAI
is in BE mode.
Signed-off-by: NXiubo Li <Li.Xiubo@freescale.com>
Acked-by: NNicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

clk_prepare_enable() may fail, so let's check its return value and propagate it
in the case of error.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

Signed-off-by: NXiubo Li <Li.Xiubo@freescale.com>
Acked-by: NNicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

This patch implements a device-tree-only CPU DAI driver for Freescale ESAI
controller that supports:

 - 12 channels playback and 8 channels record.
   [ Some of the inner transmitters and receivers are sharing same group of
     pins. So the maxmium 12 output or 8 input channels are only valid if
     there is no pin conflict occurring to it. ]

 - Independent (asynchronous mode) or shared (synchronous mode) transmit and
   receive sections with separate or shared internal/external clocks and frame
   syncs, operating in Master or Slave mode.
   [ Current ALSA seems not to allow CPU DAI drivers to configure DAI format
     separately for PLAYBACK and CAPTURE. So this first version only supports
     the case that uses the same DAI format for both directions. ]

 - Various DAI formats: I2S, Left-Justified, Right-Justified, DSP-A and DSP-B.

 - Programmable word length (8, 16, 20 or 24bits)

 - Flexible selection between system clock or external oscillator as input
   clock source, programmable internal clock divider and frame sync generation.
Signed-off-by: NNicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: NMark Brown <broonie@linaro.org>