1. 29 2月, 2012 3 次提交
  2. 25 2月, 2012 5 次提交
  3. 24 2月, 2012 12 次提交
  4. 22 2月, 2012 5 次提交
    • B
      powerpc: Fix various issues with return to userspace · 18b246fa
      Benjamin Herrenschmidt 提交于
      We have a few problems when returning to userspace. This is a
      quick set of fixes for 3.3, I'll look into a more comprehensive
      rework for 3.4. This fixes:
      
       - We kept interrupts soft-disabled when schedule'ing or calling
      do_signal when returning to userspace as a result of a hardware
      interrupt.
      
       - Rename do_signal to do_notify_resume like all other archs (and
      do_signal_pending back to do_signal, which it was before Roland
      changed it).
      
       - Add the missing call to key_replace_session_keyring() to
      do_notify_resume().
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      ---
      18b246fa
    • M
      powerpc: Fix program check handling when lockdep is enabled · 922b9f86
      Michael Ellerman 提交于
      In commit 54321242 ("Disable interrupts early in Program Check"), we
      switched from enabling to disabling interrupts in program_check_common.
      
      Whereas ENABLE_INTS leaves r3 untouched, if lockdep is enabled DISABLE_INTS
      calls into lockdep code and will clobber r3. That means we pass a bogus
      struct pt_regs* into program_check_exception() and all hell breaks loose.
      
      So load our regs pointer into r3 after we call DISABLE_INTS.
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      922b9f86
    • R
      powerpc: Remove references to cpu_*_map · 07d2f1a5
      Rusty Russell 提交于
      This has been obsolescent for a while; time for the final push.
      
      In adjacent context, replaced old cpus_* with cpumask_*.
      Signed-off-by: NRusty Russell <rusty@rustcorp.com.au>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      07d2f1a5
    • L
      sys_poll: fix incorrect type for 'timeout' parameter · faf30900
      Linus Torvalds 提交于
      The 'poll()' system call timeout parameter is supposed to be 'int', not
      'long'.
      
      Now, the reason this matters is that right now 32-bit compat mode is
      broken on at least x86-64, because the 32-bit code just calls
      'sys_poll()' directly on x86-64, and the 32-bit argument will have been
      zero-extended, turning a signed 'int' into a large unsigned 'long'
      value.
      
      We could just introduce a 'compat_sys_poll()' function for this, and
      that may eventually be what we have to do, but since the actual standard
      poll() semantics is *supposed* to be 'int', and since at least on x86-64
      glibc sign-extends the argument before invocing the system call (so
      nobody can actually use a 64-bit timeout value in user space _anyway_,
      even in 64-bit binaries), the simpler solution would seem to be to just
      fix the definition of the system call to match what it should have been
      from the very start.
      
      If it turns out that somebody somehow circumvents the user-level libc
      64-bit sign extension and actually uses a large unsigned 64-bit timeout
      despite that not being how poll() is supposed to work, we will need to
      do the compat_sys_poll() approach.
      Reported-by: NThomas Meyer <thomas@m3y3r.de>
      Acked-by: NEric Dumazet <eric.dumazet@gmail.com>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      faf30900
    • E
      ARM/audit: include audit header and fix audit arch · 5180bb39
      Eric Paris 提交于
      Both bugs being fixed were introduced in:
      29ef73b7
      
      Include linux/audit.h to fix below build errors:
      
        CC      arch/arm/kernel/ptrace.o
      arch/arm/kernel/ptrace.c: In function 'syscall_trace':
      arch/arm/kernel/ptrace.c:919: error: implicit declaration of function 'audit_syscall_exit'
      arch/arm/kernel/ptrace.c:921: error: implicit declaration of function 'audit_syscall_entry'
      arch/arm/kernel/ptrace.c:921: error: 'AUDIT_ARCH_ARMEB' undeclared (first use in this function)
      arch/arm/kernel/ptrace.c:921: error: (Each undeclared identifier is reported only once
      arch/arm/kernel/ptrace.c:921: error: for each function it appears in.)
      make[1]: *** [arch/arm/kernel/ptrace.o] Error 1
      make: *** [arch/arm/kernel] Error 2
      
      This part of the patch is:
      Reported-by: NAxel Lin <axel.lin@gmail.com>
      Reported-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
      (They both provided patches to fix it)
      
      This patch also (at the request of the list) fixes the fact that
      ARM has both LE and BE versions however the audit code was called as if
      it was always BE.  If audit userspace were to try to interpret the bits
      it got from a LE system it would obviously do so incorrectly.  Fix this
      by using the right arch flag on the right system.
      
      This part of the patch is:
      Reported-by: NRussell King - ARM Linux <linux@arm.linux.org.uk>
      Signed-off-by: NEric Paris <eparis@redhat.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      5180bb39
  5. 21 2月, 2012 11 次提交
    • R
      ARM: OMAP: fix voltage domain build errors with PM_OPP disabled · 3ddd4d0c
      Russell King 提交于
      The voltage domain code wants the voltage tables, which are in the
      opp*.c files.  These files aren't built when PM_OPP is disabled,
      causing the following build errors at link time:
      
      twl-common.c:(.init.text+0x2e48): undefined reference to `omap34xx_vddmpu_volt_data'
      twl-common.c:(.init.text+0x2e4c): undefined reference to `omap34xx_vddcore_volt_data'
      twl-common.c:(.init.text+0x2e5c): undefined reference to `omap36xx_vddmpu_volt_data'
      twl-common.c:(.init.text+0x2e60): undefined reference to `omap36xx_vddcore_volt_data'
      twl-common.c:(.init.text+0x2830): undefined reference to `omap44xx_vdd_mpu_volt_data'
      twl-common.c:(.init.text+0x283c): undefined reference to `omap44xx_vdd_iva_volt_data'
      twl-common.c:(.init.text+0x2844): undefined reference to `omap44xx_vdd_core_volt_data'
      Acked-by: NKevin Hilman <khilman@ti.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      3ddd4d0c
    • M
      ARM/PCI: Remove ARM's duplicate definition of 'pcibios_max_latency' · e23e8c06
      Myron Stowe 提交于
      The patch series to re-factor PCI's 'latency timer' setup (re:
      http://marc.info/?l=linux-kernel&m=131983853831049&w=2) forgot to
      remove the ARM specific definition of 'pcibios_max_latency' once such
      had been moved into the pci core resulting in ARM related compile
      errors -
        drivers/built-in.o:(.data+0x230): multiple definition of
        `pcibios_max_latency'
        arch/arm/common/built-in.o:(.data+0x40c): first defined here
        make[1]: *** [vmlinux.o] Error 1
      
      In the series, patch 2/16 (commit 168c8619) converted the ARM
      specific version of 'pcibios_set_master()' to a non-inlined version.
      This was done in preperation for hosting it up into PCI's core, which
      was done in patch 10/16 (commit 96c55900) of the series (and
      where the removal of ARM's 'pcibios_max_latency' was overlooked).
      Reported-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      Signed-off-by: NMyron Stowe <myron.stowe@redhat.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      e23e8c06
    • S
      ARM: 7336/1: smp_twd: Don't register CPUFREQ notifiers if local timers are not initialised · 910ba598
      Santosh Shilimkar 提交于
      Current ARM local timer code registers CPUFREQ notifiers even in case
      the twd_timer_setup() isn't called. That seems to be wrong and
      would eventually lead to kernel crash on the CPU frequency transitions
      on the SOCs where the local timer doesn't exist or broken because of
      hardware BUG. Fix it by testing twd_evt and *__this_cpu_ptr(twd_evt).
      
      The issue was observed with v3.3-rc3 and building an OMAP2+ kernel
      on OMAP3 SOC which doesn't have TWD.
      
      Below is the dump for reference :
      
       Unable to handle kernel paging request at virtual address 007e900
       pgd = cdc20000
       [007e9000] *pgd=00000000
       Internal error: Oops: 5 [#1] SMP
       Modules linked in:
       CPU: 0    Not tainted  (3.3.0-rc3-pm+debug+initramfs #9)
       PC is at twd_update_frequency+0x34/0x48
       LR is at twd_update_frequency+0x10/0x48
       pc : [<c001382c>]    lr : [<c0013808>]    psr: 60000093
       sp : ce311dd8  ip : 00000000  fp : 00000000
       r10: 00000000  r9 : 00000001  r8 : ce310000
       r7 : c0440458  r6 : c00137f8  r5 : 00000000  r4 : c0947a74
       r3 : 00000000  r2 : 007e9000  r1 : 00000000  r0 : 00000000
       Flags: nZCv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment usr
       Control: 10c5387d  Table: 8dc20019  DAC: 00000015
       Process sh (pid: 599, stack limit = 0xce3102f8)
       Stack: (0xce311dd8 to 0xce312000)
       1dc0:                                                       6000c
       1de0: 00000001 00000002 00000000 00000000 00000000 00000000 00000
       1e00: ffffffff c093d8f0 00000000 ce311ebc 00000001 00000001 ce310
       1e20: c001386c c0437c4c c0e95b60 c0e95ba8 00000001 c0e95bf8 ffff4
       1e40: 00000000 00000000 c005ef74 ce310000 c0435cf0 ce311ebc 00000
       1e60: ce352b40 0007a120 c08d5108 c08ba040 c08ba040 c005f030 00000
       1e80: c08bc554 c032fe2c 0007a120 c08d4b64 ce352b40 c08d8618 ffff8
       1ea0: c08ba040 c033364c ce311ecc c0433b50 00000002 ffffffea c0330
       1ec0: 0007a120 0007a120 22222201 00000000 22222222 00000000 ce357
       1ee0: ce3d6000 cdc2aed8 ce352ba0 c0470164 00000002 c032f47c 00034
       1f00: c0331cac ce352b40 00000007 c032f6d0 ce352bbc 0003d090 c0930
       1f20: c093d8bc c03306a4 00000007 ce311f80 00000007 cdc2aec0 ce358
       1f40: ce8d20c0 00000007 b6fe5000 ce311f80 00000007 ce310000 0000c
       1f60: c000de74 ce987400 ce8d20c0 b6fe5000 00000000 00000000 0000c
       1f80: 00000000 00000000 001fbac8 00000000 00000007 001fbac8 00004
       1fa0: c000df04 c000dd60 00000007 001fbac8 00000001 b6fe5000 00000
       1fc0: 00000007 001fbac8 00000007 00000004 b6fe5000 00000000 00202
       1fe0: 00000000 beb565f8 00101ffc 00008e8c 60000010 00000001 00000
       [<c001382c>] (twd_update_frequency+0x34/0x48) from [<c008ac4c>] )
       [<c008ac4c>] (smp_call_function_single+0x17c/0x1c8) from [<c0013)
       [<c0013890>] (twd_cpufreq_transition+0x24/0x30) from [<c0437c4c>)
       [<c0437c4c>] (notifier_call_chain+0x44/0x84) from [<c005efe4>] ()
       [<c005efe4>] (__srcu_notifier_call_chain+0x70/0xa4) from [<c005f)
       [<c005f030>] (srcu_notifier_call_chain+0x18/0x20) from [<c032fe2)
       [<c032fe2c>] (cpufreq_notify_transition+0xc8/0x1b0) from [<c0333)
       [<c033364c>] (omap_target+0x1b4/0x28c) from [<c032f47c>] (__cpuf)
       [<c032f47c>] (__cpufreq_driver_target+0x50/0x64) from [<c0331d24)
       [<c0331d24>] (cpufreq_set+0x78/0x98) from [<c032f6d0>] (store_sc)
       [<c032f6d0>] (store_scaling_setspeed+0x5c/0x74) from [<c03306a4>)
       [<c03306a4>] (store+0x58/0x74) from [<c014d868>] (sysfs_write_fi)
       [<c014d868>] (sysfs_write_file+0x80/0xb4) from [<c00f2c2c>] (vfs)
       [<c00f2c2c>] (vfs_write+0xa8/0x138) from [<c00f2e9c>] (sys_write)
       [<c00f2e9c>] (sys_write+0x40/0x6c) from [<c000dd60>] (ret_fast_s)
       Code: e594300c e792210c e1a01000 e5840004 (e7930002)
       ---[ end trace 5da3b5167c1ecdda ]---
      Reported-by: NKevin Hilman <khilman@ti.com>
      Acked-by: NMarc Zyngier <marc.zyngier@arm.com>
      Tested-by: NKevin Hilman <khilman@ti.com>
      Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      910ba598
    • L
      i387: export 'fpu_owner_task' per-cpu variable · 27e74da9
      Linus Torvalds 提交于
      (And define it properly for x86-32, which had its 'current_task'
      declaration in separate from x86-64)
      
      Bitten by my dislike for modules on the machines I use, and the fact
      that apparently nobody else actually wanted to test the patches I sent
      out.
      
      Snif. Nobody else cares.
      
      Anyway, we probably should uninline the 'kernel_fpu_begin()' function
      that is what modules actually use and that references this, but this is
      the minimal fix for now.
      Reported-by: NJosh Boyer <jwboyer@gmail.com>
      Reported-and-tested-by: NJongman Heo <jongman.heo@samsung.com>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      27e74da9
    • L
      i387: support lazy restore of FPU state · 7e16838d
      Linus Torvalds 提交于
      This makes us recognize when we try to restore FPU state that matches
      what we already have in the FPU on this CPU, and avoids the restore
      entirely if so.
      
      To do this, we add two new data fields:
      
       - a percpu 'fpu_owner_task' variable that gets written any time we
         update the "has_fpu" field, and thus acts as a kind of back-pointer
         to the task that owns the CPU.  The exception is when we save the FPU
         state as part of a context switch - if the save can keep the FPU
         state around, we leave the 'fpu_owner_task' variable pointing at the
         task whose FP state still remains on the CPU.
      
       - a per-thread 'last_cpu' field, that indicates which CPU that thread
         used its FPU on last.  We update this on every context switch
         (writing an invalid CPU number if the last context switch didn't
         leave the FPU in a lazily usable state), so we know that *that*
         thread has done nothing else with the FPU since.
      
      These two fields together can be used when next switching back to the
      task to see if the CPU still matches: if 'fpu_owner_task' matches the
      task we are switching to, we know that no other task (or kernel FPU
      usage) touched the FPU on this CPU in the meantime, and if the current
      CPU number matches the 'last_cpu' field, we know that this thread did no
      other FP work on any other CPU, so the FPU state on the CPU must match
      what was saved on last context switch.
      
      In that case, we can avoid the 'f[x]rstor' entirely, and just clear the
      CR0.TS bit.
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      7e16838d
    • L
      i387: use 'restore_fpu_checking()' directly in task switching code · 80ab6f1e
      Linus Torvalds 提交于
      This inlines what is usually just a couple of instructions, but more
      importantly it also fixes the theoretical error case (can that FPU
      restore really ever fail? Maybe we should remove the checking).
      
      We can't start sending signals from within the scheduler, we're much too
      deep in the kernel and are holding the runqueue lock etc.  So don't
      bother even trying.
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      80ab6f1e
    • L
      i387: fix up some fpu_counter confusion · cea20ca3
      Linus Torvalds 提交于
      This makes sure we clear the FPU usage counter for newly created tasks,
      just so that we start off in a known state (for example, don't try to
      preload the FPU state on the first task switch etc).
      
      It also fixes a thinko in when we increment the fpu_counter at task
      switch time, introduced by commit 34ddc81a ("i387: re-introduce FPU
      state preloading at context switch time").  We should increment the
      *new* task fpu_counter, not the old task, and only if we decide to use
      that state (whether lazily or preloaded).
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      cea20ca3
    • T
      ARM: OMAP2+: Split omap2_hsmmc_init() to properly support I2C GPIO pins · 3b972bf0
      Tony Lindgren 提交于
      Otherwise omap_device_build() and omap_mux related functions
      can't be marked as __init when twl is build as a module.
      
      If a board is using GPIO pins or regulators configured by an
      external chip, such as TWL PMIC on I2C bus, the board must
      mark those MMC controllers as deferred. Additionally both
      omap_hsmmc_init() and omap_hsmmc_late_init() must be called
      by the board.
      
      For MMC controllers using internal GPIO pins for card
      detect and regulators the slots don't need to be marked
      deferred. In this case calling omap_hsmmc_init() is sufficient.
      
      Only mark the MMC slots using gpio_cd or gpio_wd as deferred
      as noted by Igor Grinberg <grinberg@compulab.co.il>.
      
      Note that this patch does not change the behaviour for
      board-4430sdp.c board-omap4panda.c. These boards wrongly
      rely on the omap_hsmmc.c init function callback to configure
      the PMIC GPIO interrupt lines on external chip. If the PMIC
      interrupt lines are not configured during init, they will
      fail.
      Reported-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      Signed-off-by: NRajendra Nayak <rnayak@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      3b972bf0
    • O
      ARM: OMAP: omap_device: Expose omap_device_{alloc, delete, register} · 993e4fbd
      Ohad Ben-Cohen 提交于
      Expose omap_device_{alloc, delete, register} so we can use them outside
      of omap_device.c.
      
      This approach allows users, which need to manipulate an archdata member
      of a device before it is registered, to do so. This is also useful
      for users who have their devices created very early so they can be used
      at ->reserve() time to reserve CMA memory.
      
      The immediate use case for this is to set the private iommu archdata
      member, which binds a device to its associated iommu controller.
      This way, generic code will be able to attach omap devices to their
      iommus, without calling any omap-specific API.
      
      With this in hand, we can further clean the existing mainline OMAP iommu
      driver and its mainline users, and focus on generic IOMMU approaches
      for future users (rpmsg/remoteproc and the upcoming generic DMA API).
      
      This patch is still considered an interim solution until DT fully materializes
      for omap; at that point, this functionality will be removed as DT will
      take care of creating the devices and configuring them correctly.
      
      Tested on OMAP4 with a generic rpmsg/remoteproc that doesn't use any
      omap-specific IOMMU API anymore.
      Signed-off-by: NOhad Ben-Cohen <ohad@wizery.com>
      Signed-off-by: NKevin Hilman <khilman@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      993e4fbd
    • T
      ARM: OMAP: Fix build error when mmc_omap is built as module · d5171102
      Tony Lindgren 提交于
      Otherwise we get the following error:
      
      arch/arm/mach-omap2/built-in.o: In function `n8x0_mmc_callback':
      twl-common.c:(.text+0x108a0): undefined reference to
      `omap_mmc_notify_cover_event'
      
      Fix this by warning about unusable MMC cover events.
      
      The long term fix needs to change the MMC drivers to
      register board specific callbacks directly with PMIC.
      Reported-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      d5171102
    • T
      ARM: OMAP: Fix kernel panic with HSMMC when twl4030_gpio is a module · 97899e55
      Tony Lindgren 提交于
      On some omaps twl4030_gpio has a callback to try to initialize
      the MMC controller. If twl4030_gpio is compiled as a module,
      bad things can happen because the callback function starts
      calling functions that are supposed to be marked __init:
      
      Kernel panic - not syncing: Attempted to kill the idle task!
      twl4030_gpio twl4030_gpio: can't dispatch IRQs from modules
      gpiochip_add: registered GPIOs 192 to 209 on device: twl4030
      Unable to handle kernel paging request at virtual address b82a4c74
      ...
      
      Additionally if this does not fail, warnings are produced
      about trying to register the MMC multiple times.
      
      Fix this by removing __init from omap_mux_get_by_name,
      and add checks if omap2_hsmmc_init() is getting called more
      than once.
      
      Note that this will get fixed properly later on by splitting
      omap2_hsmmc_init into two functions.
      Reported-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      97899e55
  6. 19 2月, 2012 2 次提交
    • L
      i387: re-introduce FPU state preloading at context switch time · 34ddc81a
      Linus Torvalds 提交于
      After all the FPU state cleanups and finally finding the problem that
      caused all our FPU save/restore problems, this re-introduces the
      preloading of FPU state that was removed in commit b3b0870e ("i387:
      do not preload FPU state at task switch time").
      
      However, instead of simply reverting the removal, this reimplements
      preloading with several fixes, most notably
      
       - properly abstracted as a true FPU state switch, rather than as
         open-coded save and restore with various hacks.
      
         In particular, implementing it as a proper FPU state switch allows us
         to optimize the CR0.TS flag accesses: there is no reason to set the
         TS bit only to then almost immediately clear it again.  CR0 accesses
         are quite slow and expensive, don't flip the bit back and forth for
         no good reason.
      
       - Make sure that the same model works for both x86-32 and x86-64, so
         that there are no gratuitous differences between the two due to the
         way they save and restore segment state differently due to
         architectural differences that really don't matter to the FPU state.
      
       - Avoid exposing the "preload" state to the context switch routines,
         and in particular allow the concept of lazy state restore: if nothing
         else has used the FPU in the meantime, and the process is still on
         the same CPU, we can avoid restoring state from memory entirely, just
         re-expose the state that is still in the FPU unit.
      
         That optimized lazy restore isn't actually implemented here, but the
         infrastructure is set up for it.  Of course, older CPU's that use
         'fnsave' to save the state cannot take advantage of this, since the
         state saving also trashes the state.
      
      In other words, there is now an actual _design_ to the FPU state saving,
      rather than just random historical baggage.  Hopefully it's easier to
      follow as a result.
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      34ddc81a
    • L
      i387: move TS_USEDFPU flag from thread_info to task_struct · f94edacf
      Linus Torvalds 提交于
      This moves the bit that indicates whether a thread has ownership of the
      FPU from the TS_USEDFPU bit in thread_info->status to a word of its own
      (called 'has_fpu') in task_struct->thread.has_fpu.
      
      This fixes two independent bugs at the same time:
      
       - changing 'thread_info->status' from the scheduler causes nasty
         problems for the other users of that variable, since it is defined to
         be thread-synchronous (that's what the "TS_" part of the naming was
         supposed to indicate).
      
         So perfectly valid code could (and did) do
      
      	ti->status |= TS_RESTORE_SIGMASK;
      
         and the compiler was free to do that as separate load, or and store
         instructions.  Which can cause problems with preemption, since a task
         switch could happen in between, and change the TS_USEDFPU bit. The
         change to TS_USEDFPU would be overwritten by the final store.
      
         In practice, this seldom happened, though, because the 'status' field
         was seldom used more than once, so gcc would generally tend to
         generate code that used a read-modify-write instruction and thus
         happened to avoid this problem - RMW instructions are naturally low
         fat and preemption-safe.
      
       - On x86-32, the current_thread_info() pointer would, during interrupts
         and softirqs, point to a *copy* of the real thread_info, because
         x86-32 uses %esp to calculate the thread_info address, and thus the
         separate irq (and softirq) stacks would cause these kinds of odd
         thread_info copy aliases.
      
         This is normally not a problem, since interrupts aren't supposed to
         look at thread information anyway (what thread is running at
         interrupt time really isn't very well-defined), but it confused the
         heck out of irq_fpu_usable() and the code that tried to squirrel
         away the FPU state.
      
         (It also caused untold confusion for us poor kernel developers).
      
      It also turns out that using 'task_struct' is actually much more natural
      for most of the call sites that care about the FPU state, since they
      tend to work with the task struct for other reasons anyway (ie
      scheduling).  And the FPU data that we are going to save/restore is
      found there too.
      
      Thanks to Arjan Van De Ven <arjan@linux.intel.com> for pointing us to
      the %esp issue.
      
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Reported-and-tested-by: NRaphael Prevost <raphael@buro.asia>
      Acked-and-tested-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Tested-by: NPeter Anvin <hpa@zytor.com>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      f94edacf
  7. 17 2月, 2012 2 次提交