提交 · 81e911d0dcdb35203785542e0417cd8feb45df65 · openanolis / cloud-kernel

30 8月, 2017 40 次提交

clk: sunxi-ng: a83t: Support new timing mode for mmc2 clock · 81e911d0

由 Chen-Yu Tsai 提交于 7月 24, 2017

The MMC2 clock supports a new timing mode. When the new mode is active,
the output clock rate is halved.

This patch sets the feature flag for the new timing mode, and adds
a pre-divider based on the mode bit.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

81e911d0

clk: sunxi-ng: Add MP_MMC clocks that support MMC timing modes switching · dc8797e3

由 Chen-Yu Tsai 提交于 7月 24, 2017

All of our MMC clocks are of the MP clock type. A few MMC clocks on some
SoCs, such as MMC2 on the A83T, support new/old timing mode switching.

>From a clock rate point of view, when the new timing mode is active. the
output clock rate is halved.

This patch adds a special wrapper class of clocks, MP_MMC, around the
generic MP type clocks. The rate related callbacks in ccu_mp_mmc_ops
for this class look at the timing mode bit and apply the /2 post-divider
when needed, before passing it through to the generic class ops,
ccu_mp_ops.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

dc8797e3

clk: sunxi-ng: Add interface to query or configure MMC timing modes. · f6f64ed8

由 Chen-Yu Tsai 提交于 7月 24, 2017

Starting with the A83T SoC, Allwinner introduced a new timing mode for
its MMC clocks. The new mode changes how the MMC controller sample and
output clocks are delayed to match chip and board specifics. There are
two controls for this, one on the CCU side controlling how the clocks
behave, and one in the MMC controller controlling what inputs to take
and how to route them.

In the old mode, the MMC clock had 2 child clocks providing the output
and sample clocks, which could be delayed by a number of clock cycles
measured from the MMC clock's parent.

With the new mode, the 2 delay clocks are no longer active. Instead,
the delays and associated controls are moved into the MMC controller.
The output of the MMC clock is also halved.

The difference in how things are wired between the modes means that the
clock controls and the MMC controls must match. To achieve this in a
clear, explicit way, we introduce two functions for the MMC driver to
use: one queries the hardware for the current mode set, and the other
allows the MMC driver to request a mode.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

f6f64ed8

mmc: renesas-sdhi: provide a whitelist for Gen3 SoC ES versions · cd09780f

由 Simon Horman 提交于 8月 02, 2017

Provide a whitelist for Gen3 SoC ES versions for both the SYS DMAC and
internal DMAC variants of the SDHI driver. This is to allow drivers to
only initialise for Gen3 SoC ES versions for which they are the appropriate
DMAC implementation. Currently internal DMAC is the appropriate
implementation for all supported Gen3 SoC ES versions.
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
Reviewed-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

cd09780f

mmc: core: correct taac parameter according to the specification · 4406ae21

由 Shawn Lin 提交于 8月 02, 2017

Per the spec of JESD84-B51, section 7.3, replace tacc with taac to
fix the obvious typo.
Signed-off-by: NShawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

4406ae21

mmc: sdhci-msm: add static to local functions · 30de038d

由 Masahiro Yamada 提交于 7月 31, 2017

Detected by sparse.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: NAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

30de038d

mmc: of_mmc_spi: fix restricted cast warning of sparse · 306d74d9

由 Masahiro Yamada 提交于 7月 31, 2017

Sparse reports "warning: cast to restricted __be32".
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

306d74d9

mmc: bcm2835: constify mmc_host_ops structures · 2c9e89a1