- 07 2月, 2013 1 次提交
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由 Mark Brown 提交于
Use _dbg for debug messages. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 05 2月, 2013 1 次提交
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由 Ryo Tsutsui 提交于
Previously arizona_calc_fll() was checking if the target frequency is exactly divisible by reference frequency, but should have been product of the ratio and the reference frequency. Also scale down the Lamba and Theta coefficients be under 16-bits in order to match the registers. Signed-off-by: NRyo Tsutsui <ryo.tsutsui@wolfsonmicro.com> Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Cc: stable@vger.kernel.org
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- 17 1月, 2013 1 次提交
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由 Mark Brown 提交于
Otherwise we'll get the wrong LRCLK if we need to pick a higher BCLK than is required. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Cc: stable@vger.kernel.org
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- 09 1月, 2013 1 次提交
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由 Charles Keepax 提交于
The free running mode can cause problems when attempting to bring up the FLL running from a defined clock source. This patch disables free-running mode. Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 04 1月, 2013 1 次提交
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由 Mark Brown 提交于
These are not supported. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Cc: stable@vger.kernel.org
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- 24 12月, 2012 1 次提交
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由 Axel Lin 提交于
ARIZONA_AIF1_RATE_MASK is 0x7800 /* AIF1_RATE - [14:11] */ Thus we need left shift ARIZONA_AIF1_RATE_SHIFT when setting aif1 rate. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Cc: stable@vger.kernel.org
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- 09 12月, 2012 1 次提交
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 07 12月, 2012 2 次提交
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由 Mark Brown 提交于
Useful for diagnostics. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Mark Brown 提交于
So the code to suppress duplicate changes is effective. Reported-by: Kyung Kwee Ryu <Kyung-Kwee.Ryu@wolfsonmicro.comyu@wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 06 12月, 2012 1 次提交
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由 Mark Brown 提交于
Provide robustness against low quality FLL sync clocks by increasing the timeout for lock to an absurdly high point; we should never get anywhere near hitting the timeout in a real system unless it is failing. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 28 11月, 2012 2 次提交
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由 Mark Brown 提交于
Otherwise we skip reenables. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 27 11月, 2012 1 次提交
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由 Mark Brown 提交于
Some devices support higher clock rates, allow users to select these. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 16 11月, 2012 1 次提交
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由 Dimitris Papastamos 提交于
Signed-off-by: NDimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Cc: stable@vger.kernel.org
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- 27 9月, 2012 2 次提交
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由 Mark Brown 提交于
Some devices support additional clock rates. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 12 9月, 2012 1 次提交
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 06 9月, 2012 1 次提交
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由 Heather Lomond 提交于
Signed-off-by: NHeather Lomond <hlomond@opensource.wolfsonmicro.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 10 8月, 2012 1 次提交
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由 Mark Brown 提交于
Arizona devices support two output system clocks. Provide support for configuring these via set_sysclk(). Once the clock API is more useful we should migrate over to that. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 11 7月, 2012 1 次提交
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由 Mark Brown 提交于
Some Arizona chips have a higher frequency for the FLL VCO, support this in the common code. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 10 7月, 2012 1 次提交
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由 Mark Brown 提交于
Some devices have four input structures rather than three. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 09 7月, 2012 1 次提交
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 07 7月, 2012 1 次提交
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@ti.com>
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- 06 7月, 2012 1 次提交
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由 Mark Brown 提交于
If an audio interface is configured to use ASYNCCLK then update the asynchronous sample rate rather than one of our primary sample rates. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 05 7月, 2012 3 次提交
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由 Mark Brown 提交于
Allow any BCLK which can be divided down to generate LRCLK, not just the lowest possible BCLK to clock out the samples. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Mark Brown 提交于
Allow the user to select which of the system clocks each AIF is referenced to and constran the DAI to the set of frequencies which can be generated from that clock. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Mark Brown 提交于
They're the rates for the BCLK, not for the sample rate, so rename so that we don't confuse ourselves. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 23 6月, 2012 1 次提交
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由 Mark Brown 提交于
The Wolfson Arizona series of audio hub CODECs can share a large amount of their driver code as the result of a common register map. This patch adds some of this core support, providing a basis for the initial WM5102 audio driver. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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