1. 01 4月, 2015 1 次提交
  2. 27 3月, 2015 1 次提交
  3. 03 2月, 2015 2 次提交
    • M
      arm: omap2+ remove dead clock code · 42ed83f5
      Michael Turquette 提交于
      Remove omap_clocks_register and dummy_ck. The former is not used anymore
      now that the statically defined clk stuctures are replaced with proper
      descriptors and registered with the framework.
      
      The dummy clock in arch/arm/mach-omap2 is made redundant by the OMAP3+
      clock data that migrated to drivers/clk.
      
      An additional benefit to this clean-up is removing the references to
      clk-private.h which will be removed.
      
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Tero Kristo <t-kristo@ti.com>
      Acked-by: NTony Lindgren <tony@atomide.com>
      Signed-off-by: NMichael Turquette <mturquette@linaro.org>
      42ed83f5
    • T
      clk: Make clk API return per-user struct clk instances · 035a61c3
      Tomeu Vizoso 提交于
      Moves clock state to struct clk_core, but takes care to change as little API as
      possible.
      
      struct clk_hw still has a pointer to a struct clk, which is the
      implementation's per-user clk instance, for backwards compatibility.
      
      The struct clk that clk_get_parent() returns isn't owned by the caller, but by
      the clock implementation, so the former shouldn't call clk_put() on it.
      
      Because some boards in mach-omap2 still register clocks statically, their clock
      registration had to be updated to take into account that the clock information
      is stored in struct clk_core now.
      Signed-off-by: NTomeu Vizoso <tomeu.vizoso@collabora.com>
      Reviewed-by: NStephen Boyd <sboyd@codeaurora.org>
      Tested-by: NTony Lindgren <tony@atomide.com>
      Signed-off-by: NMichael Turquette <mturquette@linaro.org>
      [mturquette@linaro.org: adapted clk_has_parent to struct clk_core
                              applied OMAP3+ DPLL fix from Tero & Tony]
      035a61c3
  4. 08 1月, 2015 1 次提交
  5. 14 11月, 2014 1 次提交
  6. 12 11月, 2014 1 次提交
  7. 16 7月, 2014 5 次提交
  8. 11 7月, 2014 1 次提交
  9. 02 7月, 2014 1 次提交
  10. 28 5月, 2014 3 次提交
  11. 18 1月, 2014 6 次提交
  12. 20 10月, 2013 1 次提交
  13. 18 3月, 2013 1 次提交
  14. 01 2月, 2013 1 次提交
  15. 15 12月, 2012 1 次提交
    • J
      ARM: OMAP4: Enhance support for DPLLs with 4X multiplier · 3ff51ed8
      Jon Hunter 提交于
      On OMAP4 devices, the ABE DPLL has an internal 4X multiplier that can
      be enabled or disabled in addition to the standard configurable
      multiplier (M) for OMAP DPLLs. When configuring the ABE DPLL the 4X
      multiplier is accounted for by checking to see whether it is enabled or
      not. However, when calculating a new rate we only check to see if the
      rate can be achieved with the current setting for the 4X multiplier.
      Enhance the round_rate() function for such DPLLs to see if the rate
      can be achieved with the 4X multiplier if it cannot be achieved without
      the 4X multiplier.
      
      This change is necessary, because when using the 32kHz clock as the
      source clock for the ABE DPLL, the default DPLL frequency for the ABE
      DPLL cannot be achieved without enabling the 4X multiplier.
      
      When using the 32kHz clock as the source clock for the ABE DPLL and
      attempting to lock the DPLL to 98.304MHz (default frequency), it was
      found that the DPLL would fail to lock if the low-power mode for the DPLL
      was not enabled. From reviewing boot-loader settings that configure the
      ABE DPLL it was found that the low-power mode is enabled when using the
      32kHz clock source, however, the documentation for OMAP does not state
      that this is a requirement. Therefore, introduce a new function for
      OMAP4 devices to see if low-power mode can be enabled when calculating a
      new rate to ensure the DPLL will lock.
      
      New variables for the last calculated 4X multiplier and low-power
      setting have been added to the dpll data structure as well as variables
      defining the bit mask for enabling these features via the DPLL's
      control_reg. It is possible that we could eliminate these bit masks from
      the dpll data structure as these bit masks are not unique to OMAP4, if
      it is preferred.
      
      The function omap3_noncore_program_dpll() has been updated to avoid
      passing the calculated values for the multiplier (M) and divider (N) as
      these are stored in the clk structure.
      Signed-off-by: NJon Hunter <jon-hunter@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      3ff51ed8
  16. 13 11月, 2012 9 次提交
  17. 09 11月, 2012 1 次提交
  18. 19 10月, 2012 2 次提交
  19. 30 6月, 2012 1 次提交
    • V
      ARM: OMAP3+: clock33xx: Add AM33XX clock tree data · e30384ab
      Vaibhav Hiremath 提交于
      AM33XX clock implementation is different than any existing OMAP
      family of devices. Although DPLL module is similar to OMAP4
      device, but the usage is very much different than OMAP4.
      AM33XX has different peripheral set and each module gets
      integrated to the clock framework differently than OMAP
      family of devices.
      
      This patch adds full Clock tree data for AM33XX family
      of devices and also integrates it into existing OMAP framework.
      Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com>
      Signed-off-by: NAfzal Mohammed <afzal@ti.com>
      Signed-off-by: NVaibhav Bedia <vaibhav.bedia@ti.com>
      Cc: Kevin Hilman <khilman@ti.com>
      Cc: Rajendra Nayak <rnayak@ti.com>
      CC: Tony Lindgren <tony@atomide.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Benoit Cousson <b-cousson@ti.com>
      [paul@pwsan.com: updated to apply; changed 'soc_is_am33xx' to
       'cpu_is_am33xx' to match usage in Tony's current am33xx branch]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      e30384ab