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      drm/nouveau/core: add support for secure boot · 7d12388a
      Alexandre Courbot 提交于
      On GM200 and later GPUs, firmware for some essential falcons (notably
      GR ones) must be authenticated by a NVIDIA-produced signature and
      loaded by a high-secure falcon in order to be able to access privileged
      registers, in a process known as Secure Boot.
      
      Secure Boot requires building a binary blob containing the firmwares
      and signatures of the falcons to be loaded. This blob is then given to
      a high-secure falcon running a signed loader firmware that copies the
      blob into a write-protected region, checks that the signatures are
      valid, and finally loads the verified firmware into the managed falcons
      and switches them to privileged mode.
      
      This patch adds infrastructure code to support this process on chips
      that require it.
      
      v2:
      - The IRQ mask of the PMU falcon was left - replace it with the proper
        irq_mask variable.
      - The falcon reset procedure expecting a falcon in an initialized state,
        which was accidentally provided by the PMU subdev. Make sure that
        secboot can manage the falcon on its own.
      Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com>
      Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      7d12388a