- 29 6月, 2012 21 次提交
-
-
由 Archit Taneja 提交于
Currently the interlace parameter passed to dispc_ovl_setup() is configured by checking the display type, and set to true if the display type is VENC. This isn't correct as other panels can take interlaced content too. The omap_video_timings struct in manager's private data contains the info whether the panel is in interlaced mode or not. Signed-off-by: NArchit Taneja <archit@ti.com>
-
由 Archit Taneja 提交于
Add a parameter called interlace which tells whether the timings are in interlaced or progressive mode. This aligns the omap_video_timings struct with the Xorg modeline configuration. It also removes the hack needed to write to divide the manager height by 2 if the connected interface is VENC. Signed-off-by: NArchit Taneja <archit@ti.com>
-
由 Archit Taneja 提交于
omap_panel_config contains fields which are finally written to DISPC_POL_FREQo registers. These are now held by omap_video_timings and are set when the manager timings are applied. Remove the omap_panel_config enum, and remove all it's references from panel or interface drivers. Signed-off-by: NArchit Taneja <archit@ti.com>
-
由 Archit Taneja 提交于
Use the newly added fields in omap_video_timings(hsync, vsync and data_enable logic levels and data, hsync and vsync latching related info) to configure/retrieve corresponding sync flags in fb_var_screeninfo and fb_videomode. Out of the new fields, hsync_level and vsync_level can be mapped to the fb sync flags FB_SYNC_HOR_HIGH_ACT and FB_SYNC_VERT_HIGH_ACT. When converting fb mode to omap_video_timings, the fields which don't have an equivalent parameter in fb are kept as the original values if the panel driver has a get_timings op, else they are set to default values. Signed-off-by: NArchit Taneja <archit@ti.com>
-
由 Archit Taneja 提交于
dispc_mgr_set_pol_freq() configures the fields in the register DISPC_POL_FREQo. All these fields have been moved to omap_video_timings struct, and are now programmed in dispc_mgr_set_lcd_timings(). These will be configured when timings are applied via dss_mgr_set_timings(). Remove dispc_mgr_set_pol_freq() and it's calls from the interface drivers. Signed-off-by: NArchit Taneja <archit@ti.com>
-
由 Archit Taneja 提交于
Hsync, Vsync, Data enable enable logic levels and latching info of Data lanes, Hsync and Vsync signals(with respect to pixel clock) are newly added parameters in omap_video_timings. Program these in dispc_mgr_set_lcd_timings. These will be configured when the manager's timings are set via dss_mgr_set_timings(). Signed-off-by: NArchit Taneja <archit@ti.com>
-
由 Archit Taneja 提交于
The display sysfs file for viewing/storing display timings is something which will be deprecated. The new omap_video_timings fields (hsync_level, vsync_level and others) are not configurable or viewable via this sysfs file. This prevents the need to make the input more configurable to take the new fields and at the same time work without these fields for backward compatibility. In display_timings_store, the omap_video_timings struct used to set the timings is initialized to the existing panel timings so that the new fields are taken in correctly. The other fields are taken from the user as before. Signed-off-by: NArchit Taneja <archit@ti.com>
-
由 Archit Taneja 提交于
Some panel timing related fields are contained in omap_panel_config in the form of flags. The fields are: - Hsync logic level - Vsync logic level - Data driven on rising/falling edge of pixel clock - Output enable/Data enable logic level - HSYNC/VSYNC driven on rising/falling edge of pixel clock Out of these parameters, Hsync and Vsync logic levels are a part of the timings in the Xorg modeline configuration. So it makes sense to move the to omap_video_timings. The rest aren't a part of modeline, but it still makes sense to move these since they are related to panel timings. These fields stored in omap_panel_config in dssdev are configured for LCD panels, and the corresponding LCD managers in the DISPC_POL_FREQo registers. Add the above fields in omap_video_timings. Represent their state via new enums. Add these parameters to the omap_video_timings instances in the panel drivers. Keep the corresponding IVS, IHS, IPC, IEO, RF and ONOFF flags in omap_panel_config for now. The struct will be removed later. Signed-off-by: NArchit Taneja <archit@ti.com>
-
由 Archit Taneja 提交于
Remove configuration of Ac-bias pins Ac-bias pins need to be configured only for passive matrix displays. Remove acbi and acb fields in omap_dss_device and their configuration in panel drivers. Don't program these fields in DISP_POL_FREQo register any more. The panel driver for sharp-ls037v7dw01, and the panel config for Innolux AT070TN8 in generic dpi panel driver set acb to a non zero value. This is most likely carried over from the old omapfb driver which supported passive matrix displays. Cc: Thomas Weber <weber@corscience.de> Signed-off-by: NArchit Taneja <archit@ti.com>
-
由 Archit Taneja 提交于
Remove omap_lcd_display_type enum The enum omap_lcd_display_type is used to configure the lcd display type in DISPC. Remove this enum and always set display type to TFT by creating function dss_mgr_set_lcd_type_tft(). Signed-off-by: NArchit Taneja <archit@ti.com>
-
由 Archit Taneja 提交于
Remove OMAP_DSS_LCD_TFT as a omap_panel_config flag. We don't support passive matrix displays any more. Remove this flag from all the panel drivers. Force the display_type to OMAP_DSS_LCD_DISPLAY_TFT in the interface drivers. Signed-off-by: NArchit Taneja <archit@ti.com>
-
由 Archit Taneja 提交于
Remove clock constraints related to passive matrix displays. There is a constraint (pcd_min should be 3) for passive matrix displays. Remove this constraint in clock divider calculations as we won't support passive matrix displays any more. This cleans up the functions which calculate the clock dividers with DSI's PLL or DSS_FCLK as the clock source. Signed-off-by: NArchit Taneja <archit@ti.com>
-
由 Jassi Brar 提交于
State change of HDMI PHY could potentially take many millisecs, we can do better by protecting things in hdmi_set_phy_pwr() with a mutex rather than a spin_lock_irqsave. Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
-
由 Jassi Brar 提交于
It is simpler to read the current status from a register as compared to maintaining a state variable to hold the information. Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
-
由 Chandrabhanu Mahapatra 提交于
DISPC functions have been modified to provide clock and register dumps and debug support for the LCD3 manager. Signed-off-by: NChandrabhanu Mahapatra <cmahapatra@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
-
由 Chandrabhanu Mahapatra 提交于
The support for LCD3 manager has been added into the manager module. LCD3 panel has registers as DISPC_CONTROL3 and DISPC_CONFIG3 just like those in LCD and LCD2 panels. These registers control the Display Controller (DISPC) module for LCD3 output. The three LCDs support Display Serial Interface (DSI), Remote Frame Buffer Interface (RFBI) and Parallel CMOS Output Interface (DPI). These LCDs can be connected through parallel output interface using DISPC and RFBI or DPI. For serial interface DSS uses DSI. The LCD3 panel, just like LCD and LCD2 panels, has a clock switch in DSS_CTRL register which has been enabled. The clock switch chooses between DSS_CLK and DPLL_DSI1_C_CLK1 as source for LCD3_CLK. New IRQs as DISPC_IRQ_VSYNC3, DISPC_IRQ_FRAMEDONE3, DISPC_IRQ_ACBIAS_COUNT_STAT3 and DISPC_IRQ_SYNC_LOST3 have been added specific to the new manager. Signed-off-by: NChandrabhanu Mahapatra <cmahapatra@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
-
由 Chandrabhanu Mahapatra 提交于
OMAP5 Display Subsystem (DSS) architecture comes with a additional LCD3 channel with its own dedicated overlay manager. The current patch adds LCD3 channel and basic register support for LCD3 channel. It adds register addresses for various Display Controller (DISPC) registers like DISPC_DEFAULT_COLOR, DISPC_TIMING_H, DISPC_DIVISORo, etc. Signed-off-by: NChandrabhanu Mahapatra <cmahapatra@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
-
由 Chandrabhanu Mahapatra 提交于
The current implementation of LCD channels and managers consists of a number of if-else construct which has been replaced by a simpler interface. A constant structure mgr_desc has been created in Display Controller (DISPC) module. The mgr_desc contains for each channel its name, irqs and is initialized one time with all registers and their corresponding fields to be written to enable various features of Display Subsystem. This structure is later used by various functions of DISPC which simplifies the further implementation of LCD channels and its corresponding managers. Signed-off-by: NChandrabhanu Mahapatra <cmahapatra@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
-
由 Tomi Valkeinen 提交于
If runtime PM is not enabled in the kernel config, pm_runtime_get_sync() will always return 1 and pm_runtime_put_sync() will always return -ENOSYS. pm_runtime_get_sync() returning 1 presents no problem to the driver, but -ENOSYS from pm_runtime_put_sync() causes the driver to print a warning. One option would be to ignore errors returned by pm_runtime_put_sync() totally, as they only say that the call was unable to put the hardware into suspend mode. However, I chose to ignore the returned -ENOSYS explicitly, and print a warning for other errors, as I think we should get notified if the HW failed to go to suspend properly. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Cc: Jassi Brar <jaswinder.singh@linaro.org> Cc: Grazvydas Ignotas <notasas@gmail.com>
-
由 Tomi Valkeinen 提交于
The current way how omapdss handles system suspend and resume is that omapdss device (a platform device, which is not part of the device hierarchy of the DSS HW devices, like DISPC and DSI, or panels.) uses the suspend and resume callbacks from platform_driver to handle system suspend. It does this by disabling all enabled panels on suspend, and resuming the previously disabled panels on resume. This presents a few problems. One is that as omapdss device is not related to the panel devices or the DSS HW devices, there's no ordering in the suspend process. This means that suspend could be first ran for DSS HW devices and panels, and only then for omapdss device. Currently this is not a problem, as DSS HW devices and panels do not handle suspend. Another, more pressing problem, is that when suspending or resuming, the runtime PM functions return -EACCES as runtime PM is disabled during system suspend. This causes the driver to print warnings, and operations to fail as they think that they failed to bring up the HW. This patch changes the omapdss suspend handling to use PM notifiers, which are called before suspend and after resume. This way we have a normally functioning system when we are suspending and resuming the panels. This patch, I believe, creates a problem that somebody could enable or disable a panel between PM_SUSPEND_PREPARE and the system suspend, and similarly the other way around in resume. I choose to ignore the problem for now, as it sounds rather unlikely, and if it happens, it's not fatal. In the long run the system suspend handling of omapdss and panels should be thought out properly. The current approach feels rather hacky. Perhaps the panel drivers should handle system suspend, or the users of omapdss (omapfb, omapdrm) should handle system suspend. Note that after this patch we could probably revert 0eaf9f52 (OMAPDSS: use sync versions of pm_runtime_put). But as I said, this patch may be temporary, so let's leave the sync version still in place. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Reported-by: NJassi Brar <jaswinder.singh@linaro.org> Tested-by: NJassi Brar <jaswinder.singh@linaro.org>
-
由 Rajendra Nayak 提交于
In preparation of OMAP moving to Common Clk Framework(CCF) change clk_enable() and clk_disable() calls to clk_prepare_enable() and clk_disable_unprepare() in omapdss. This can be safely done, as omapdss never enables or disables clocks in atomic context. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: <linux-fbdev@vger.kernel.org> Cc: Paul Walmsley <paul@pwsan.com> Cc: Mike Turquette <mturquette@linaro.org> [tomi.valkeinen@ti.com: updated patch description] Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
-
- 28 6月, 2012 2 次提交
-
-
由 Peter Meerwald 提交于
Signed-off-by: NPeter Meerwald <pmeerw@pmeerw.net> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
-
由 Tomi Valkeinen 提交于
We have two almost the same enums: omap_channel and omap_dss_overlay_managers. omap_channel is used almost everywhere, and omap_channel assigns explicit values to the enum values which are needed for proper operation. omap_dss_overlay_managers is only used in one place, so it's easy to remove it, which is what this patch does. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
-
- 09 6月, 2012 1 次提交
-
-
由 Linus Torvalds 提交于
This reverts commit 9e612a00. It incorrectly finds VGA connectors where none are attached, apparently not noticing that nothing replied to the EDID queries, and happily using the default EDID modes that have nothing to do with actual hardware. That in turn then causes X to fall down to the lowest common denominator, which is usually the default 1024x768 mode that is in the default EDID and pretty much anything supports). I'd suggest that if not relying on the HDP pin, the code should at least check whether it gets valid EDID data back, rather than just assume there's something on the VGA connector. Cc: Dave Airlie <airlied@linux.ie> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
- 08 6月, 2012 1 次提交
-
-
由 Borislav Petkov 提交于
Correct mail address reference to a mail account which I actually read. Signed-off-by: NBorislav Petkov <bp@alien8.de> Cc: Peter Feuerer <peter@piie.net> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
- 07 6月, 2012 5 次提交
-
-
由 Artem Bityutskiy 提交于
Commit "62f38455 UBI: modify ubi_wl_flush function to clear work queue for a lnum" takes the 'work_sem' semaphore in write mode for the entire loop, which is not very good because it will block other workers for potentially long time. We do not need to have it in write mode - read mode is enough, and we do not need to hole it over the entire loop. So this patch turns changes the locking: takes 'work_sem' in read mode and pushes it down to the loop. Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com>
-
由 Artem Bityutskiy 提交于
Commit "aa44d1d3 UBI: remove Kconfig debugging option" broke UBI and it refuses to initialize if debugfs (CONFIG_DEBUG_FS) is disabled. I incorrectly assumed that debugfs files creation function will return success if debugfs is disabled, but they actually return -ENODEV. This patch fixes the issue. Reported-by: NPaul Parsons <lost.distance@yahoo.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Tested-by: NPaul Parsons <lost.distance@yahoo.com>
-
由 Adam Jackson 提交于
Cougar/Panther Point redefine the bits in SDEIIR pretty completely. This function is just debugging, but if we're debugging we probably want to be told accurate things instead of lies. I'm told Lynx Point changes this yet more, but I have no idea how... Note from Eugeni's review: "For the record and for future enabling efforts, for LPT, bits 28-31 and 1-14 are gone since CPT/PPT (e.g., those must be zero). And there is the bit 15 as a new addition, but we are not using it yet and probably won't be using in foreseeable future." Signed-off-by: NAdam Jackson <ajax@redhat.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=35103Reviewed-by: NEugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
-
由 Sagi Grimberg 提交于
1. Limit the max number of WQEs per QP reported when querying the device, so that ib_create_qp() will not fail for a QP size that the device claimed to support due to additional headroom WQEs being allocated. 2. Limit qp resources accepted for ib_create_qp() to the limits reported in ib_query_device(). In kernel space, make sure that the limits returned to the caller following qp creation also lie within the reported device limits. For userspace, report as before, and do adjustment in libmlx4 (so as not to break ABI). Signed-off-by: NJack Morgenstein <jackm@dev.mellanox.co.il> Signed-off-by: NSagi Grimberg <sagig@mellanox.co.il> Signed-off-by: NOr Gerlitz <ogerlitz@mellanox.com> Signed-off-by: NRoland Dreier <roland@purestorage.com>
-
由 Jack Morgenstein 提交于
Commit 096335b3 ("mlx4_core: Allow dynamic MTU configuration for IB ports") modifies the port VL setting. This exposes a bug in mlx4_common_set_port(), where the VL cap value passed in (inside the command mailbox) is incorrectly zeroed-out: mlx4_SET_PORT modifies the VL_cap field (byte 3 of the mailbox). Since the SET_PORT command is paravirtualized on the master as well as on the slaves, mlx4_SET_PORT_wrapper() is invoked on the master. This calls mlx4_common_set_port() where mailbox byte 3 gets overwritten by code which should only set a single bit in that byte (for the reset qkey counter flag) -- but instead overwrites the entire byte. The result is that when running in SR-IOV mode, the VL_cap will be set to zero -- fix this. Signed-off-by: NJack Morgenstein <jackm@dev.mellanox.co.il> Signed-off-by: NOr Gerlitz <ogerlitz@mellanox.com> Signed-off-by: NRoland Dreier <roland@purestorage.com>
-
- 06 6月, 2012 2 次提交
-
-
由 Eugeni Dodonov 提交于
This seems to come on Gigabyte H55M-S2V and was discovered through the https://bugs.freedesktop.org/show_bug.cgi?id=50381 debugging. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=50381Signed-off-by: NEugeni Dodonov <eugeni.dodonov@intel.com> Cc: stable@vger.kernel.org Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
-
由 Daniel Vetter 提交于
Or at least plug another gapping hole. Apparrently hw desingers only moved the bit field, but did not bother ot re-enumerate the planes when adding support for a 3rd pipe. Discovered by i-g-t/flip_test. This may or may not fix the reference bugzilla, because that one smells like we have still larger fish to fry. v2: Fixup the impossible case to catch programming errors, noticed by Chris Wilson. References: https://bugs.freedesktop.org/show_bug.cgi?id=50069Acked-by: NChris Wilson <chris@chris-wilson.co.uk> Tested-by: NEugeni Dodonov <eugeni.dodonov@intel.com> Eugeni Dodonov <eugeni.dodonov@intel.com> Cc: stable@vger.kernel.org Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
-
- 05 6月, 2012 8 次提交
-
-
由 Alex Deucher 提交于
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Christian König 提交于
Locking mutex in different orders just screams for deadlocks, and some testing showed that it is actually quite easy to trigger them. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Cc: stable@vger.kernel.org Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Alex Deucher 提交于
- Properly set up the RBs - Properly set up the SPI - Properly set up gb_addr_config This should fix rendering issues on certain cards. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Rafał Miłecki 提交于
Many TVs and A/V receivers don't work with this bit set. Problem was confirmed using: Onkyo TX-SR605, Sony BRAVIA KDL-52X3500, Sony BRAVIA KDL-40S40xx. In theory this bit shouldn't affect audio engine when feeding it with data, however it seems it does. Driver fglrx doesn't set that bit in any of the above cases. This fixes a regression introduced by 3.5-rc1. Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Rafał Miłecki 提交于
This is based on info released by AMD, should allow using audio in much more cases. Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Cc: <stable@vger.kernel.org> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Alex Deucher 提交于
Call it in the asic startup callback on all asics. Previously r600 and rv770 called it in the startup and resume callbacks while all the other asics called it in the startup callback. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Seung-Woo Kim 提交于
Blending for graphic layer 0 of hdmi mixer was not set so video layer cannot be showed if graphic layer 0 is enabled. This patch fixes blending values to support blending between graphic layer 0 and video layer. Signed-off-by: NSeung-Woo Kim <sw0312.kim@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
-
由 Laurent Pinchart 提交于
The encoder get_crtc operation is called to retrieve a pointer to the CRTC the encoder is currenctly connected to, right after setting the encoder::crtc field to the new CRTC. The implementation of this operation returns the pointer to the new CRTC, which is then pointlessly compared to itself. As the operation is not mandatory, don't implement it. Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NInki Dae <inki.dae@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
-