- 23 3月, 2015 1 次提交
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由 Seungwon Jeon 提交于
Implements HS400 mode support for exynos host driver. This also include some updates as new mode is added. Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com> Signed-off-by: NAlim Akhtar <alim.akhtar@samsung.com> [Alim: addressed review comments] Tested-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 28 1月, 2015 1 次提交
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由 Dmitry Torokhov 提交于
dw_mci_pltfm_remove() is not (nor should it be) marked as __exit, so we should not be using __exit_p() wrapper with it. Signed-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com> Reviewed-by: NDoug Anderson <dianders@chromium.org> Tested-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 19 1月, 2015 4 次提交
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由 Ulf Hansson 提交于
Instead of having a local hack taking care of sending the tuning command and as well to verify the response pattern, let's convert to the common mmc_send_tuning() API. This change affects the Exynos variant, since it's the only one which support the dw_mmc's ->execute_tuning() callback. It's seems like dw_mmc internal logic expects failed data transfers to be ended using a stop command. Let the tuning requests also fall into this category, since there are data transfer involved. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Acked-by: NJaehoon Chung <jh80.chung@samsung.com> Reviewed-by: NAlim Akhtar <alim.akhtar@samsung.com> Tested-by: NAlim Akhtar <alim.akhtar@samsung.com>
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由 Beomho Seo 提交于
This patch remove unnecessary 'out of memory' message on dw mmc driver. Signed-off-by: NBeomho Seo <beomho.seo@samsung.com> Acked-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Seungwon Jeon 提交于
Move exynos related definition to header file. And this also changes some of the registers name to match the standard naming convention. Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com> Acked-by: NJaehoon Chung <jh80.chung@samsung.com> [Alim: updated the commit message] Signed-off-by: NAlim Akhtar <alim.akhtar@samsung.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Seungwon Jeon 提交于
Add checking whether the clock is valid. Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com> Acked-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NAlim Akhtar <alim.akhtar@samsung.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 26 11月, 2014 1 次提交
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由 Abhilash Kesavan 提交于
The Exynos7 has a DWMMC controller (v2.70a) which is different from prior versions. This patch adds new compatible strings for exynos7. This patch also fixes the CLKSEL register offset on exynos7. Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com> Tested-by: NVivek Gautam <gautam.vivek@samsung.com> Acked-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 13 5月, 2014 1 次提交
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由 Sachin Kamat 提交于
'dw_mci_exynos_pmops' is local to this file. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Acked-by: NJaehoon Chung <jh80.chung@samsung.com> Acked-by: NSeungwon Jeon <tgih.jun@samsung.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NChris Ball <chris@printf.net>
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- 21 4月, 2014 1 次提交
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由 Seungwon Jeon 提交于
Replaced UHS_DDR50 with MMC_DDR52. And MMC_CAP_UHS_DDR50 is removed because of non-implementation of UHS signaling. Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com> Acked-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NChris Ball <chris@printf.net>
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- 09 11月, 2013 1 次提交
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由 Yuvaraj Kumar C D 提交于
e6c784ed ("mmc: dw_mmc: exynos: move the exynos private init") was wrongly assigning ddr_timing value to sdr_timing. This patch fixes this by reverting the sdr_timing assignment statement to the earlier location. Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com> Acked-by: NSeungwon Jeon <tgih.jun@samsung.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 26 9月, 2013 5 次提交
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由 Seungwon Jeon 提交于
Exynos's host has divider logic before 'cclk_in' to controller core. It means that actual clock rate of ciu clock comes from this divider value. So, source clock should be adjusted along with 'ciu_div' which indicates the host's divider ratio. Setting clock rate basically fits the required speed. Specially, 'cclk_in' should have double rate of target speed in case of DDR 8-bit mode. Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com> Tested-by: NAlim Akhtar <alim.akhtar@samsung.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Seungwon Jeon 提交于
Implements variable delay tuning. In this change, exynos host can determine the correct sampling point for the HS200 and SDR104 speed mode. Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com> Tested-by: NAlim Akhtar <alim.akhtar@samsung.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Yuvaraj Kumar C D 提交于
Exynos5420 Mobile Storage Host controller has Security Management Unit (SMU) for channel 0 and channel 1 (mainly for eMMC). This time, SMU configuration is set for non-encryption mode. Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com> Signed-off-by: NAlim Akhtar <alim.akhtar@samsung.com> Tested-by: NJaehoon Chung <jh80.chung@samsung.com> Acked-by: NSeungwon Jeon <tgih.jun@samsung.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Yuvaraj Kumar C D 提交于
Currently platform specific private data initialization is done by dw_mci_exynos_priv_init and dw_mci_exynos_parse_dt. As we already have separate platform specific device tree parser dw_mci_exynos_parse_dt, move the dw_mci_exynos_priv_init code to dw_mci_exynos_parse_dt. We can use the dw_mci_exynos_priv_init to do some actual platform specific initialization of SMU and etc. Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com> Tested-by: NAlim Akhtar <alim.akhtar@samsung.com> Tested-by: NJaehoon Chung <jh80.chung@samsung.com> Acked-by: NSeungwon Jeon <tgih.jun@samsung.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Doug Anderson 提交于
If the WAKEUP_INT is asserted at wakeup and not cleared, we'll end up looping around forever. This has been seen to happen on exynos5420 silicon despite the fact that we haven't enabled any wakeup events due to a silicon errata. It is safe to do on all exynos variants. Signed-off-by: NDoug Anderson <dianders@chromium.org> Acked-by: NSeungwon Jeon <tgih.jun@samsung.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 25 8月, 2013 1 次提交
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由 Yuvaraj Kumar C D 提交于
The Exynos5420 has a DWMMC controller which is different from prior versions.This patch adds a new compatible string for Exynos5420. Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com> Reviewed-by: NAlim Akhtar <alim.akhtar@samsung.com> Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com> Acked-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 28 6月, 2013 1 次提交
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由 Dinh Nguyen 提交于
Add platform specific functionality for the DW SD/MMC driver for SoCFPGA. Move SDMMC_CMD_USE_HOLD_REG to dw_mmc.h so other platforms can use this define. Signed-off-by: NDinh Nguyen <dinguyen@altera.com> Reviewed-by: NPavel Machek <pavel@denx.de> Acked-by: NJaehoon Chung <jh80.chung@samsung.com> Acked-by: NOlof Johansson <olof@lixom.net> Acked-by: Seungwon Jeon <tgih.jun@samsung.com Signed-off-by: NChris Ball <cjb@laptop.org>
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- 13 4月, 2013 1 次提交
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由 Thomas Abraham 提交于
With device core now able to setup the default pin configuration, the pin configuration code based on the deprecated Samsung specific gpio bindings is removed. Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Reviewed-by: NDoug Anderson <dianders@chromium.org> Tested-by: NDoug Anderson <dianders@chromium.org> Acked-by: NSeungwon Jeon <tgih.jun@samsung.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 23 3月, 2013 2 次提交
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由 Dongjin Kim 提交于
This patch adds the compatible string for MSHC controller of Exynos4412. And exynos5250_dwmmc_caps is renamed to exynos_dwmmc_caps, since it has the capabilities of common features supported by Exynos4 and Exynos5. Signed-off-by: NDongjin Kim <tobetter@gmail.com> Acked-by: NSeungwon Jeon <tgih.jun@samsung.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Sachin Kamat 提交于
'dw_mci_exynos_match' is always compiled in. Hence of_match_ptr is not required. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Acked-by: NJaehoon Chung <jh80.chung@samsung.com> Acked-by: NSeungwon Jeon <tgih.jun@samsung.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 12 3月, 2013 1 次提交
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由 Sachin Kamat 提交于
Silences the following sparse warning: drivers/mmc/host/dw_mmc-exynos.c:218:5: warning: symbol 'dw_mci_exynos_probe' was not declared. Should it be static? Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Acked-by: NJaehoon Chung <jh80.chung@samsung.com> Acked-by: NSeungwon Jeon <tgih.jun@samsung.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 25 2月, 2013 1 次提交
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由 Doug Anderson 提交于
The exynos code claimed the write protect with devm_gpio_request() but never did anything with it. That meant that anyone using a write protect GPIO would effectively be write protected all the time. The handling for wp-gpios belongs in the main dw_mmc driver and has been moved there. Signed-off-by: NDoug Anderson <dianders@chromium.org> Acked-by: NSeungwon Jeon <tgih.jun@samsung.com> Acked-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 08 11月, 2012 2 次提交
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由 Arnd Bergmann 提交于
The of_device_id match data is now marked as const and must not be modified. This changes the dw_mmc to mark all pointers passing the dw_mci_drv_data or dw_mci_dma_ops structures as const, and also marks the static definitions as const. drivers/mmc/host/dw_mmc-exynos.c: In function 'dw_mci_exynos_probe': drivers/mmc/host/dw_mmc-exynos.c:234:11: warning: assignment discards 'const' qualifier from pointer target type [enabled by default] Signed-off-by: NArnd Bergmann <arnd@arndb.de> Cc: Thomas Abraham <thomas.abraham@linaro.org> Cc: Will Newton <will.newton@imgtec.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Arnd Bergmann 提交于
The MODULE_DEVICE_TABLE entry for dw_mci_exynos_match was incorrectly copied from the platform back-end, which causes this error when building the driver as a loadable module: drivers/mmc/host/dw_mmc-exynos.c: At top level: drivers/mmc/host/dw_mmc-exynos.c:226:34: error: '__mod_of_device_table' aliased to undefined symbol 'dw_mci_pltfm_match' This patch fixes the problem by just using the correct string. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Cc: Thomas Abraham <thomas.abraham@linaro.org> Cc: Will Newton <will.newton@imgtec.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 03 10月, 2012 1 次提交
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由 Thomas Abraham 提交于
Samsung Exynos SoC's extend the dw-mshc controller for additional clock and bus control. Add support for these extensions and include provide device tree based discovery suppory as well. Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org> Acked-by: NWill Newton <will.newton@imgtec.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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