“2f4c9be81ca250586d0803f0913551942d9db9f2”上不存在“uniCloud-aliyun/database/default.jql”
  1. 13 2月, 2012 1 次提交
  2. 15 12月, 2011 19 次提交
  3. 12 12月, 2011 1 次提交
  4. 11 11月, 2011 1 次提交
  5. 30 10月, 2011 10 次提交
  6. 22 9月, 2011 3 次提交
    • J
      [SCSI] mpt2sas: take size of pointed value, not pointer · 96a99501
      Julia Lawall 提交于
      Sizeof a pointer-typed expression returns the size of the pointer, not that
      of the pointed data.
      
      The semantic patch that fixes this problem is as follows:
      (http://coccinelle.lip6.fr/)
      
      // <smpl>
      @@
      expression *e;
      type T;
      identifier f;
      @@
      
      f(...,(T)e,...,
      -sizeof(e)
      +sizeof(*e)
      ,...)
      // </smpl>
      Signed-off-by: NJulia Lawall <julia@diku.dk>
      Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>
      96a99501
    • N
    • N
      [SCSI] mpt2sas: Added NUNA IO support in driver which uses multi-reply queue support of the HBA · 911ae943
      nagalakshmi.nandigama@lsi.com 提交于
      Support added for controllers capable of multi reply queues.
      
      The following are the modifications to the driver to support NUMA.
      
      1) Create the new structure adapter_reply_queue to contain the reply queue
         info for every msix vector.  This object will contain a
         reply_post_host_index, reply_post_free for each instance, msix_index, among
         other parameters.  We will track all the reply queues on a link list called
         ioc->reply_queue_list. Each reply queue is aligned with each IRQ, and is
         passed to the interrupt via the bus_id parameter.
      
      (2) The driver will figure out the msix_vector_count from the PCIe MSIX
          capabilities register instead of the IOC Facts->MaxMSIxVectors. This is
          because the firmware is not filling in this field until the driver has
          already registered MSIX support.
      
      (3) If the ioc_facts reports that the controller is MSIX compatible in the
          capabilities, then the driver will request for multiple irqs.  This count
          is calculated based on the minimum between the online cpus available and
          the ioc->msix_vector_count.  This count is reported to firmware in the
          ioc_init request.
      
      (4) New routines were added _base_free_irq and _base_request_irq, so
          registering and freeing msix vectors were done thru simple function API.
      
      (5) The new routine _base_assign_reply_queues was added to align the msix
          indexes across cpus. This will initialize the array called
          ioc->cpu_msix_table.  This array is looked up on every MPI request so the
          MSIxIndex is set appropriately.
      
      (6) A new shost sysfs attribute was added to report the reply_queue_count.
      
      (7) User needs to set the affinity cpu mask, so the interrupts occur on the
          same cpu that sent the original request.
      Signed-off-by: NNagalakshmi Nandigama <nagalakshmi.nandigama@lsi.com>
      Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>
      911ae943
  7. 15 9月, 2011 1 次提交
  8. 27 8月, 2011 1 次提交
  9. 26 7月, 2011 1 次提交
  10. 30 6月, 2011 2 次提交