Pretty much any node can have a status property, so it doesn't need to
be in examples.

Converted with the following command and removed examples with SoC and
board specific splits:

git grep -l -E 'status.*=.*' Documentation/devicetree/ | xargs sed -i -E '/\sstatus.*=.*"(disabled|ok|okay)/d'
Acked-by: NMark Rutland <mark.rutland@arm.com>
Signed-off-by: NRob Herring <robh@kernel.org>

The Linux coresight drivers define the programmable ATB replicator as
Qualcomm replicator, while this is designed by ARM. This can cause
confusion to a user selecting the driver. Cleanup all references to
make it explicitly clear. This patch :

 1) Replace the compatible string for the replicator :
      qcom,coresight-replicator1x => arm,coresight-dynamic-replicator
 2) Changes the Kconfig symbol (since this is not part of any defconfigs)
     CORESIGHT_QCOM_REPLICATOR => CORESIGHT_DYNAMIC_REPLICATOR
 3) Improves the help message in the Kconfig.
 4) Changes the name of the driver and the file :
      coresight-replicator-qcom => coresight-dynamic-replicator

Cc: Pratik Patel <pratikp@codeaurora.org>
Cc: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: devicetree@vger.kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>
Acked-by: NRob Herring <robh+dt@kernel.org>
Signed-off-by: NSuzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Adding board generic support for dra762 family.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The Cortex-A35 uses some implementation defined perf events.

The Cortex-A35 derives from the Cortex-A53 core, using the same event mapings
based on Cortex-A35 TRM r0p2, section C2.3 - Performance monitoring events
(pages C2-562 to C2-565).
Signed-off-by: NJulien Thierry <julien.thierry@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>

The Cortex-A73 uses some implementation defined perf events.

This patch sets up the necessary mapping for Cortex-A73.

Mappings are based on Cortex-A73 TRM r0p2, section 11.9 Events
(pages 11-457 to 11-460).
Signed-off-by: NJulien Thierry <julien.thierry@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>

Document the device tree binding for the gpio controllers found on the
Marvell Armada 7K and Armada 8K SoCs.
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>

Add CCN-502 to the list of supported devices by ARM CCN PMU driver.
Signed-off-by: NVelibor Markovski <velibor.markovski@broadcom.com>
Acked-by: NMark Rutland <mark.rutland@arm.com>
Signed-off-by: NScott Branden <scott.branden@broadcom.com>
Signed-off-by: NPawel Moll <pawel.moll@arm.com>

Add bindings documentation for the CC board from Shenzhen Libre
Technology
Signed-off-by: NJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

The Devicetree Specification has superseded the ePAPR as the
base specification for bindings.  Update files in Documentation
to reference the new document.

First reference to ePAPR in Documentation/devicetree/bindings/arm/cci.txt
is generic, remove it.

Some files are not updated because there is no hypervisor chapter
in the Devicetree Specification:
   Documentation/devicetree/bindings/powerpc/fsl/msi-pic.txt
   Documenation/virtual/kvm/api.txt
   Documenation/virtual/kvm/ppc-pv.txt
Signed-off-by: NFrank Rowand <frank.rowand@sony.com>
Signed-off-by: NRob Herring <robh@kernel.org>

Document the device tree binding for the pin controllers found on the
Armada 7K and Armada 8K SoCs.
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>

Document the device tree binding for the pin controllers found on the
Armada 7K and Armada 8K SoCs.
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>

This patch updates the documentation according to the change made in the
patch "clk: mvebu: cp110: add sdio clock to cp-110 system controller"
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>

This patch updates the documentation according to the change made in the
patch "pinctrl: dt-bindings: cp110: introduce a new binding".
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>

This patch updates the documentation according to the change made in the
patch "clk: mvebu: cp110: do not depend anymore of the
*-clock-output-names": the clock names are no more part of the binding.
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>

The Actions Semi S500 SoC requires a special secondary CPU boot procedure.
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NAndreas Färber <afaerber@suse.de>

The Actions Semi S900 is a quad-core ARM Cortex-A53 SoC.
The Bubblegum-96 is a 96Boards Consumer Edition compliant board (4/96).

Cc: 96boards@ucrobotics.com
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NAndreas Färber <afaerber@suse.de>

The Actions Semi S500 is a quad-core ARM Cortex-A9 SoC.
The LeMaker Guitar is an SODIMM-format module with that SoC.
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NAndreas Färber <afaerber@suse.de>

Add bindings for HiKey960 Board.
Signed-off-by: NGuodong Xu <guodong.xu@linaro.org>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NWei Xu <xuwei5@hisilicon.com>

Whistler is an ancient Tegra 2 reference board. I may have been the only
person who ever used it with upstream software, and I've just recycled
the board hardware. Hence, it makes sense to remove support from software.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NMark Brown <broonie@kernel.org>
Signed-off-by: NThierry Reding <treding@nvidia.com>

The Renesas Salvator-XS (Salvator-X 2nd version) development board can
be equipped with either an R-Car H3 ES2.0 or M3-W ES1.x SiP, which are
pin-compatible.

Document board part number and compatible values for the version with
R-Car H3.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The board part numbers for the R-Car H3 and M3 ULCB boards corresponded
to versions predating mass production.  Update them for mass production.

Note that the H3 ULCB board can be equipped with either revision ES1.1
or ES2.0 of the R-Car H3 SoC.  While these have different board part
numbers, no new compatible values are needed, as the revision can be
detected at runtime using the PRR register.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: NVladimir Barinov <vladimir.barinov+renesas@cogentembedded.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Document the iW-RainboW-G20D-Qseven-RZG1M device tree bindings,
listing it as a supported board.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Reviewed-by: NChris Paterson <chris.paterson2@renesas.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Document the iW-RainboW-G20M-Qseven-RZG1M device tree bindings,
listing it as a supported system on module.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Reviewed-by: NChris Paterson <chris.paterson2@renesas.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add device tree source for Renesas GR-Peach board.
GR-Peach is an RZ/A1H based board with 10MB of on-chip SRAM and 8MB
QSPI flash storage.
Add support for the board, and create a 2MB partition to use as rootfs.
Signed-off-by: NJacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

According to ARMv8 architecture reference manual (ARM DDI 0487A.k)
Chapter 'Part H: External debug', the CPU can integrate debug module
and it can support self-hosted debug and external debug. Especially
for supporting self-hosted debug, this means the program can access
the debug module from mmio region; and usually the mmio region is
integrated with coresight.

So add document for binding debug component, includes binding to APB
clock; and also need specify the CPU node which the debug module is
dedicated to specific CPU.
Suggested-by: NMike Leach <mike.leach@linaro.org>
Signed-off-by: NLeo Yan <leo.yan@linaro.org>
Reviewed-by: NSuzuki K Poulose <suzuki.poulose@arm.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

This adds dt-binding documentation for MediaTek MT7622 SoC
which currently only includes basic items such as ARM CPU,
MediaTek SYSIRQ and UART.
Signed-off-by: NSean Wang <sean.wang@mediatek.com>
Reviewed-by: NMatthias Brugger <matthias.bgg@gmail.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NMatthias Brugger <matthias.bgg@gmail.com>

This patch adds DT bindings info for Broadcom Stingray SOC
and related reference boards.
Signed-off-by: NAnup Patel <anup.patel@broadcom.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

Reference to cpu capacity binding has a wrong number. Fix it.
Reported-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: NJuri Lelli <juri.lelli@arm.com>
Acked-by: NRob Herring <robh@kernel.org>
Acked-by: NRussell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Introduce necessary compatibles to describe the armv7m based SoCs.
Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>

This patch updates the documentation according to the changes made in the
patch "clk: mvebu: ap806: introduce a new binding"
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: NMichael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/32e35c1d5919bdf9dc7d58678f0c0b462886d03e.1496239589.git-series.gregory.clement@free-electrons.com

This patch updates the documentation according to the change made in the
patch "clk: mvebu: ap806: do not depend anymore of the
*-clock-output-names": the clock names are no more part of the binding.
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: NMichael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/d502b5abc68cbb5739ce72ba8be27528f9042a28.1496239589.git-series.gregory.clement@free-electrons.com

The FriendlyARM NanoPi K2 is a single-board computer.

Cc: techsupport@friendlyarm.com
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NAndreas Färber <afaerber@suse.de>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

Cc: ada@kingnoval.com
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NAndreas Färber <afaerber@suse.de>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

The Zidoo X9S and a few other recent TV boxes feature the Realtek RTD1295,
a quad-core ARM Cortex-A53 SoC.
Acked-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NRoc He <hepeng@zidoo.tv>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NAndreas Färber <afaerber@suse.de>

This augments the platform bindings for the Gemini SoC to include
the fact that the system controller also provides clock and reset
lines.
Acked-by: NRob Herring <robh@kernel.org>
Acked-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add a new binding for the new K2G Industrial Communication Engine evm.
Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NSantosh Shilimkar <ssantosh@kernel.org>

Enforce groupment by SoCs, and order alphabetically within the group
(with some exceptions). This should facilitate adding new boards.
Signed-off-by: NAndreas Färber <afaerber@suse.de>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

This adds dt-binding documentation for Mediatek MT6797. Only
include very basic items, gic, uart timer and cpu.
Signed-off-by: NMars Cheng <mars.cheng@mediatek.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NMatthias Brugger <matthias.bgg@gmail.com>

Rockchip finally named the SOC as RV1108, so change it
for compatible.

The rk1108/rv1108 is completely new to the market, so there no real
devices exist in the wild, only the Rockchip internal evaluation
board. Therefore we're not breaking any existing devices when
changing compatible values.
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Acked-by: NRob Herring <robh@kernel.org>

[added paragraph about no real devices existing]
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

Use "firefly,firefly-rk3399" compatible string for firefly-rk3399 board.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>