- 21 8月, 2009 6 次提交
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由 Peter Ujfalusi 提交于
Do not allow applications to use the full buffer found on McBSP1,3,4,5. Using the full buffer in threshold mode causes the McBSP buffer to run dry, which can be observed as channels are switching (in reality the channels are shifting). Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Eduardo Valentin 提交于
This patch export through sysfs two properties to configure maximum threshold for transmission and reception on each mcbsp instance. Also, it exports two helper functions to allow mcbsp users to read this values. Signed-off-by: NEduardo Valentin <eduardo.valentin@nokia.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Eduardo Valentin 提交于
This patch adds a way to handle transmit/receive threshold. It export to mcbsp users a callback registration procedure. Signed-off-by: NEduardo Valentin <eduardo.valentin@nokia.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Eduardo Valentin 提交于
Increasing startup delay value as worst case: CLKSRG*2 = 8000khz: (1/8000) * 2 * 2 usec Although, 100us may give enough time for two CLKSRG, due to some unknown PM related, clock gating etc. reason, this patch increases it to 500us. Signed-off-by: NEduardo Valentin <eduardo.valentin@nokia.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Eduardo Valentin 提交于
Adding McBSP register definition for IRQEN, IRQSTATUS, THRESHOLD2 and THRESHOLD1 registers. Signed-off-by: NEduardo Valentin <eduardo.valentin@nokia.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Eero Nurkkala 提交于
ASoC has an annoying bug letting either L or R channel to be played on L channel. In other words, L and R channels can switch at random. This provides McBSP funtionality that may be used to fix this feature. Signed-off-by: NEero Nurkkala <ext-eero.nurkkala@nokia.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 18 8月, 2009 1 次提交
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由 Joonyoung Shim 提交于
The data format configuration for S3C64xx IISv2 was hardcoded for IISMOD register. This patch changes to the defined values it. And instead of bits 9 and 10 of IISMOD we should clear bits 13 and 14. Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 14 8月, 2009 1 次提交
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由 Marek Vasut 提交于
This patch adds support for passing platform data to ac97 bus devices from PXA2xx-AC97 driver.. Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 07 8月, 2009 1 次提交
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由 Jarkko Nikula 提交于
Simultaneous audio playback and capture on OMAP1510 can cause that second stream is stalled if there is enough delay between startup of the audio streams. Current implementation of the omap_mcbsp_start is starting both transmitter and receiver at the same time and it is called only for firstly started audio stream from the OMAP McBSP based ASoC DAI driver. Since DMA request lines on OMAP1510 are edge sensitive, the DMA request is missed if there is no DMA transfer set up at that time when the first word after McBSP startup is transmitted. The problem hasn't noted before since later OMAPs are using level sensitive DMA request lines. Fix the problem by changing API of omap_mcbsp_start and omap_mcbsp_stop by allowing to start and stop individually McBSP transmitter and receiver logics. Then call those functions individually for both audio playback and capture streams. This ensures that DMA transfer is setup before transmitter or receiver is started. Thanks to Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> for detailed problem analysis and Peter Ujfalusi <peter.ujfalusi@nokia.com> for info about DMA request line behavior differences between the OMAP generations. Reported-and-tested-by: NJanusz Krzysztofik <jkrzyszt@tis.icnet.pl> Signed-off-by: NJarkko Nikula <jhnikula@gmail.com> Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 23 6月, 2009 1 次提交
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由 Russell King 提交于
pm_idle is used by infrastructure (eg, cpuidle) which expects architectures to call it in a certain way. Arrange for ARM to follow x86's lead on this and call pm_idle() with interrupts already disabled. However, we expect pm_idle() to enable interrupts before it returns. Also, OMAP wants to be able to disable hlt-ing, so allow hlt_counter to prevent all calls to pm_idle. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 22 6月, 2009 5 次提交
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由 Marek Szyprowski 提交于
Fix gpio-config off-by-one bug. Without this patch, touching GPA0 pin on S3C64XX platform causes kernel oops. Reviewed-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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由 Marek Szyprowski 提交于
N group Add to_irq() function to onvert gpio to irq for external interrupt group (GPN). Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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由 Peter Korsgaard 提交于
The usb-host clock was using the wrong define (the SCLK enable for the usb-host-bus) to change the HCLK register instead of the HCLK_UHOST bit. Signed-off-by: NPeter Korsgaard <jacmet@sunsite.dk> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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由 Peter Korsgaard 提交于
A few typos seems to have sneaked into the HCLK gate defines, causing the usb host clock to not get enabled. Fix them according to the reference manual and throw in the 3d accel bit for good measure. Signed-off-by: NPeter Korsgaard <jacmet@sunsite.dk> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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由 Linus Torvalds 提交于
This allows the callers to now pass down the full set of FAULT_FLAG_xyz flags to handle_mm_fault(). All callers have been (mechanically) converted to the new calling convention, there's almost certainly room for architectures to clean up their code and then add FAULT_FLAG_RETRY when that support is added. Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 21 6月, 2009 2 次提交
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 20 6月, 2009 10 次提交
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由 Roel Kluin 提交于
with while (i++ < MAX_CLOCK_ENABLE_WAIT); i can reach MAX_CLOCK_ENABLE_WAIT + 1 after the loop, so if (i == MAX_CLOCK_ENABLE_WAIT) that's still success. Signed-off-by: NRoel Kluin <roel.kluin@gmail.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Paul Walmsley 提交于
Correspondence with the TI OMAP hardware team indicates that SDRC_DLLA_CTRL.FIXEDDELAY should be initialized to 0x0f. This number was apparently derived from process validation. This is only used when the SDRC DLL is unlocked (e.g., SDRC clock frequency less than 83MHz). Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Tero Kristo 提交于
Previously only 1 and 2 was supported. This is needed for DVFS VDD2 control. Signed-off-by: NTero Kristo <tero.kristo@nokia.com>
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由 Paul Walmsley 提交于
Convert omap3_sram_configure_core_dpll() to use macros rather than magic numbers. Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Paul Walmsley 提交于
Clean up comments and copyrights on the CORE DPLL3 M2 divider change code. Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Paul Walmsley 提交于
Program the SDRC_MR_0 register as well during SDRC clock changes. This register allows selection of the memory CAS latency. Some SDRAM chips, such as the Qimonda HYB18M512160AF6, have a lower CAS latency at lower clock rates. Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Paul Walmsley 提交于
When changing the SDRAM clock from 166MHz to 83MHz via the CORE DPLL M2 divider, add a short delay before returning to SDRAM to allow the SDRC time to stabilize. Without this delay, the system is prone to random panics upon re-entering SDRAM. This time delay varies based on MPU frequency. At 500MHz MPU frequency at room temperature, 64 loops seems to work okay; so add another 32 loops for environmental and process variation. Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Paul Walmsley 提交于
On the OMAP3, initialize SDRC timings when the kernel boots. This ensures that the kernel is running with known, optimized SDRC timings, rather than whatever was configured by the bootloader. Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Paul Walmsley 提交于
The original CDP kernel that this code comes from waited for 0x800 loops after switching the CORE DPLL M2 divider. This does not appear to be necessary. Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Joonyoung Shim 提交于
This patch supports the cache handling for some old Feroceon cores for which the CPU ID is like 0x41159260. This is a complement to commit ab6d15d5. Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 19 6月, 2009 6 次提交
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由 Catalin Marinas 提交于
When a kthread function returns, it branches to do_exit(). However, the unwinding information isn't valid anymore and any stack trace caused by do_exit() may be incorrect. This patch adds a kernel_thread_exit() function and annotated with '.cantunwind' so that the unwinder stops when reaching it. Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Catalin Marinas 提交于
There are situations where the unwinder goes beyond stack boundaries and unwinds random data. This patch moves the stack boundaries check after the unwind_exec_insn() call and adds an extra check for possible infinite loops (like "mov pc, lr" with pc == lr). The patch also fixes a bug in the unwind instructions interpreter. The 0xb0 instruction can only set PC to LR if this wasn't already set by a previous instruction (this is used on exceptions taken while in kernel mode where svc_entry is annotated with ".save {r0 - pc}"). Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Catalin Marinas 提交于
Not discarding these sections when hotplug isn't available prevents the kernel from building. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 George G. Davis 提交于
From: Min Zhang <mzhang@mvista.com> Add alignment fault fixup support for 32-bit Thumb-2 LDM, LDRD, POP, PUSH, STM and STRD instructions. Alignment fault fixup support for the remaining 32-bit Thumb-2 load/store instruction cases is not included since ARMv6 and later processors include hardware support for loads and stores of unaligned words and halfwords. Signed-off-by: NMin Zhang <mzhang@mvista.com> Signed-off-by: NGeorge G. Davis <gdavis@mvista.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Catalin Marinas 提交于
The cpu member of struct irq_desc was recently renamed to node. The patch renames the ARM references to the old member. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Catalin Marinas 提交于
This header file is needed for twd_base. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 18 6月, 2009 1 次提交
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由 Matthew Wilcox 提交于
This function was only used by pci_claim_resource(), and the last commit deleted that use. Signed-off-by: NMatthew Wilcox <willy@linux.intel.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 17 6月, 2009 6 次提交
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由 Alexey Dobriyan 提交于
* create mm/init-mm.c, move init_mm there * remove INIT_MM, initialize init_mm with C99 initializer * unexport init_mm on all arches: init_mm is already unexported on x86. One strange place is some OMAP driver (drivers/video/omap/) which won't build modular, but it's already wants get_vm_area() export. Somebody should look there. [akpm@linux-foundation.org: add missing #includes] Signed-off-by: NAlexey Dobriyan <adobriyan@gmail.com> Cc: Mike Frysinger <vapier.adi@gmail.com> Cc: Americo Wang <xiyou.wangcong@gmail.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Andy Green 提交于
This patch introduces the Openmoko GTA02 machine definition. Much of the code is based on Harald Welte's work, although it has been largely rewritten several times. This is intended to be the minimum machine definition to boot and be able to run a rootfs from NAND on GTA02 / FreeRunner. It does not bring up the framebuffer / Glamo and lacks many other peripheral drivers from outside the SoC. But once we have this basis in mainline kernel, we will be able to introduce the other drivers and add them here. Thanks to Sven Rebhan <odinshorse@googlemail.com> for his fixes to this patch (Kconfig and defconfig files). Signed-off-by: NAndy Green <andy@warmcat.com> Signed-off-by: NNelson Castillo <arhuaco@freaks-unidos.net> [ben-linux@fluff.org: Fix the GPIO definitions] Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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由 Mark Brown 提交于
This patch provides initial support for CPU frequency scaling on the Samsung S3C ARM processors. Currently only S3C6410 processors are supported, though addition of another data table with supported clock rates should be sufficient to enable support for further CPUs. Use the regulator framework to provide optional support for DVFS in the S3C cpufreq driver. When a software controllable regulator is configured the driver will use it to lower the supply voltage when running at a lower frequency, giving improved power savings. When regulator support is disabled or no regulator can be obtained for VDDARM the driver will fall back to scaling only the frequency. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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由 Mark Brown 提交于
This allows the S3C64XX IIS drivers to be converted to the standard driver model and allows fixes there for problems with attempting to acquire the clocks for the IIS blocks via the clock API. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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由 Huang Weiyi 提交于
Remove duplicated #include in arch/arm/mach-s3c2410/usb-simtec.c. Signed-off-by: NHuang Weiyi <weiyi.huang@gmail.com> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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