1. 14 3月, 2017 1 次提交
  2. 08 3月, 2017 1 次提交
  3. 07 3月, 2017 2 次提交
  4. 28 2月, 2017 1 次提交
  5. 24 2月, 2017 1 次提交
  6. 07 2月, 2017 1 次提交
  7. 01 2月, 2017 1 次提交
  8. 31 1月, 2017 6 次提交
  9. 28 1月, 2017 1 次提交
  10. 25 1月, 2017 1 次提交
  11. 24 1月, 2017 3 次提交
  12. 20 1月, 2017 3 次提交
    • T
      ahci: qoriq: added ls2088a platforms support · ce8f4537
      Tang Yuantian 提交于
      Ls2088a is new introduced arm-based soc with sata support with
      following features:
      1. Complies with the serial ATA 3.0 specification and the AHCI 1.3.1
         specification
      2. Contains a high-speed descriptor-based DMA controller
      3. Supports the following:
         a. Speeds of 1.5 Gb/s (first-generation SATA), 3 Gb/s
            (second-generation SATA), and 6 Gb/s (third-generation SATA)
         b. FIS-based switching
         c. Native command queuing (NCQ) commands
         d. Port multiplier operation
         e. Asynchronous notification
         f. SATA BIST mode
      Signed-off-by: NTang Yuantian <yuantian.tang@nxp.com>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      ce8f4537
    • T
      ahci: qoriq: report error when ecc register address is missing in dts · 01f2901a
      Tang Yuantian 提交于
      For ls1021a, and armv8 chasis 2 socs, sata ecc must be disabled.
      If ecc register is not found in sata node in dts, report error.
      
      This is a chip erratum described as bellow:
      The Read DMA operations get early termination indication from the
      controller. This issue is observed as CRC error in the status registers.
      The issue is due to address collision at address 0 in the dual port
      memory. The read is a dummy read to flush out the header, but due to
      collision the controller logs the mbit error reported by the ECC check
      logic. This results in the early termination of the Read DMA operation
      by the controller. The issue happens to all the interface
      speeds(GEN1/2/3) for all the products.
      
      Workaround:
      Disable ECC feature on those platforms.
      Signed-off-by: NTang Yuantian <yuantian.tang@nxp.com>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      01f2901a
    • T
      ahci: qoriq: added a condition to enable dma coherence · 386dc3b8
      Tang Yuantian 提交于
      Enable DMA coherence in SATA controller on condition that
      dma-coherent property exists in sata node in DTS.
      Signed-off-by: NTang Yuantian <yuantian.tang@nxp.com>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      386dc3b8
  13. 19 1月, 2017 1 次提交
  14. 16 1月, 2017 1 次提交
    • A
      ahci: imx: fix building without hwmon or thermal · d7969f59
      Arnd Bergmann 提交于
      When CONFIG_HWMON is disabled, we now get a link failure:
      
      ERROR: "devm_hwmon_device_register_with_groups" [drivers/ata/ahci_imx.ko] undefined!
      drivers/ata/ahci_imx.o: In function `imx_ahci_probe':
      ahci_imx.c:(.text.imx_ahci_probe+0x304): undefined reference to `devm_thermal_zone_of_sensor_register'
      
      This makes the code calling into the hwmon subsystem compile-time
      conditional, and adds a Kconfig dependency to avoid the corner
      case of having HWMON=m and AHCI_IMX=y, by forcing AHCI_IMX=m in this
      case. The thermal subsystem already has a check in its header, but
      that also doesn't cover the THERMAL=m case, so we need a somewhat
      complex Kconfig expression to handle all cases.
      
      Fixes: 54643a83 ("ahci: imx: Add imx53 SATA temperature sensor support")
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Acked-by: NReviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      d7969f59
  15. 11 1月, 2017 4 次提交
  16. 10 1月, 2017 5 次提交
  17. 09 1月, 2017 2 次提交
  18. 07 1月, 2017 5 次提交