1. 15 7月, 2008 1 次提交
  2. 09 7月, 2008 1 次提交
  3. 03 7月, 2008 1 次提交
  4. 01 7月, 2008 4 次提交
    • M
      powerpc: Fix compile error for CONFIG_VSX · 436db693
      Michael Neuling 提交于
      Fix compile error when CONFIG_VSX is enabled.
      
      arch/powerpc/kernel/signal_64.c: In function 'restore_sigcontext':
      arch/powerpc/kernel/signal_64.c:241: error: 'i' undeclared (first use in this function)
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      436db693
    • S
      powerpc: Explicitly copy elements of pt_regs · fcbc5a97
      Stephen Rothwell 提交于
      Gcc 4.3 produced this warning:
      
      arch/powerpc/kernel/signal_64.c: In function 'restore_sigcontext':
      arch/powerpc/kernel/signal_64.c:161: warning: array subscript is above array bounds
      
      This is caused by us copying to aliases of elements of the pt_regs
      structure.  Make those explicit.
      
      This adds one extra __get_user and unrolls a loop.
      Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      fcbc5a97
    • M
      powerpc: Add VSX context save/restore, ptrace and signal support · ce48b210
      Michael Neuling 提交于
      This patch extends the floating point save and restore code to use the
      VSX load/stores when VSX is available.  This will make FP context
      save/restore marginally slower on FP only code, when VSX is available,
      as it has to load/store 128bits rather than just 64bits.
      
      Mixing FP, VMX and VSX code will get constant architected state.
      
      The signals interface is extended to enable access to VSR 0-31
      doubleword 1 after discussions with tool chain maintainers.  Backward
      compatibility is maintained.
      
      The ptrace interface is also extended to allow access to VSR 0-31 full
      registers.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      ce48b210
    • M
      powerpc: Introduce VSX thread_struct and CONFIG_VSX · c6e6771b
      Michael Neuling 提交于
      The layout of the new VSR registers and how they overlap on top of the
      legacy FPR and VR registers is:
      
                         VSR doubleword 0               VSR doubleword 1
                ----------------------------------------------------------------
        VSR[0]  |             FPR[0]            |                              |
                ----------------------------------------------------------------
        VSR[1]  |             FPR[1]            |                              |
                ----------------------------------------------------------------
                |              ...              |                              |
                |              ...              |                              |
                ----------------------------------------------------------------
        VSR[30] |             FPR[30]           |                              |
                ----------------------------------------------------------------
        VSR[31] |             FPR[31]           |                              |
                ----------------------------------------------------------------
        VSR[32] |                             VR[0]                            |
                ----------------------------------------------------------------
        VSR[33] |                             VR[1]                            |
                ----------------------------------------------------------------
                |                              ...                             |
                |                              ...                             |
                ----------------------------------------------------------------
        VSR[62] |                             VR[30]                           |
                ----------------------------------------------------------------
        VSR[63] |                             VR[31]                           |
                ----------------------------------------------------------------
      
      VSX has 64 128bit registers.  The first 32 regs overlap with the FP
      registers and hence extend them with and additional 64 bits.  The
      second 32 regs overlap with the VMX registers.
      
      This commit introduces the thread_struct changes required to reflect
      this register layout.  Ptrace and signals code is updated so that the
      floating point registers are correctly accessed from the thread_struct
      when CONFIG_VSX is enabled.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      c6e6771b
  5. 09 6月, 2008 1 次提交
  6. 12 10月, 2007 1 次提交
  7. 26 6月, 2007 1 次提交
    • P
      [POWERPC] Fix subtle FP state corruption bug in signal return on SMP · ae62fbb5
      Paul Mackerras 提交于
      This fixes a bug which can cause corruption of the floating-point state
      on return from a signal handler.  If we have a signal handler that has
      used the floating-point registers, and it happens to context-switch to
      another task while copying the interrupted floating-point state from the
      user stack into the thread struct (e.g. because of a page fault, or
      because it gets preempted), the context switch code will think that the
      FP registers contain valid FP state that needs to be copied into the
      thread_struct, and will thus overwrite the values that the signal return
      code has put into the thread_struct.
      
      This can occur because we clear the MSR bits that indicate the presence
      of valid FP state after copying the state into the thread_struct.  To fix
      this we just move the clearing of the MSR bits to before the copy.  A
      similar potential problem also occurs with the Altivec state, and this
      fixes that in the same way.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      ae62fbb5
  8. 14 6月, 2007 5 次提交
  9. 09 5月, 2007 1 次提交
  10. 01 7月, 2006 1 次提交
  11. 09 6月, 2006 3 次提交
    • P
      [PATCH] powerpc: Implement support for setting little-endian mode via prctl · fab5db97
      Paul Mackerras 提交于
      This adds the PowerPC part of the code to allow processes to change
      their endian mode via prctl.
      
      This also extends the alignment exception handler to be able to fix up
      alignment exceptions that occur in little-endian mode, both for
      "PowerPC" little-endian and true little-endian.
      
      We always enter signal handlers in big-endian mode -- the support for
      little-endian mode does not amount to the creation of a little-endian
      user/kernel ABI.  If the signal handler returns, the endian mode is
      restored to what it was when the signal was delivered.
      
      We have two new kernel CPU feature bits, one for PPC little-endian and
      one for true little-endian.  Most of the classic 32-bit processors
      support PPC little-endian, and this is reflected in the CPU feature
      table.  There are two corresponding feature bits reported to userland
      in the AT_HWCAP aux vector entry.
      
      This is based on an earlier patch by Anton Blanchard.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      fab5db97
    • B
      [PATCH] powerpc vdso updates · a5bba930
      Benjamin Herrenschmidt 提交于
      This patch cleans up some locking & error handling in the ppc vdso and
      moves the vdso base pointer from the thread struct to the mm context
      where it more logically belongs. It brings the powerpc implementation
      closer to Ingo's new x86 one and also adds an arch_vma_name() function
      allowing to print [vsdo] in /proc/<pid>/maps if Ingo's x86 vdso patch is
      also applied.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      a5bba930
    • P
      powerpc: Fix machine check problem on 32-bit kernels · 7c85d1f9
      Paul Mackerras 提交于
      This fixes a bug found by Dave Jones that means that it is possible
      for userspace to provoke a machine check on 32-bit kernels.  This
      also fixes a couple of other places where I found similar problems
      by inspection.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      7c85d1f9
  12. 28 3月, 2006 1 次提交
    • L
      [PATCH] powerpc: fix incorrect SA_ONSTACK behaviour for 64-bit processes · 11089f08
      Laurent MEYER 提交于
      *) When setting a sighandler using sigaction() call, if the flag
      SA_ONSTACK is set and no alternate stack is provided via sigaltstack(),
      the kernel still try to install the alternate stack. This behavior is
      the opposite of the one which is documented in Single Unix
      Specifications V3.
      
      *) Also when setting an alternate stack using sigaltstack() with the
      flag SS_DISABLE, the kernel try to install the alternate stack on
      signal delivery.
      
      These two use cases makes the process crash at signal delivery.
      
      This fixes it.
      Signed-off-by: NLaurent Meyer <meyerlau@fr.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      11089f08
  13. 27 3月, 2006 1 次提交
  14. 08 3月, 2006 1 次提交
    • P
      powerpc: Fix various syscall/signal/swapcontext bugs · 1bd79336
      Paul Mackerras 提交于
      A careful reading of the recent changes to the system call entry/exit
      paths revealed several problems, plus some things that could be
      simplified and improved:
      
      * 32-bit wasn't testing the _TIF_NOERROR bit in the syscall fast exit
        path, so it was only doing anything with it once it saw some other
        bit being set.  In other words, the noerror behaviour would apply to
        the next system call where we had to reschedule or deliver a signal,
        which is not necessarily the current system call.
      
      * 32-bit wasn't doing the call to ptrace_notify in the syscall exit
        path when the _TIF_SINGLESTEP bit was set.
      
      * _TIF_RESTOREALL was in both _TIF_USER_WORK_MASK and
        _TIF_PERSYSCALL_MASK, which is odd since _TIF_RESTOREALL is only set
        by system calls.  I took it out of _TIF_USER_WORK_MASK.
      
      * On 64-bit, _TIF_RESTOREALL wasn't causing the non-volatile registers
        to be restored (unless perhaps a signal was delivered or the syscall
        was traced or single-stepped).  Thus the non-volatile registers
        weren't restored on exit from a signal handler.  We probably got
        away with it mostly because signal handlers written in C wouldn't
        alter the non-volatile registers.
      
      * On 32-bit I simplified the code and made it more like 64-bit by
        making the syscall exit path jump to ret_from_except to handle
        preemption and signal delivery.
      
      * 32-bit was calling do_signal unnecessarily when _TIF_RESTOREALL was
        set - but I think because of that 32-bit was actually restoring the
        non-volatile registers on exit from a signal handler.
      
      * I changed the order of enabling interrupts and saving the
        non-volatile registers before calling do_syscall_trace_leave; now we
        enable interrupts first.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      1bd79336
  15. 10 2月, 2006 1 次提交
  16. 08 2月, 2006 1 次提交
  17. 19 1月, 2006 2 次提交
  18. 12 1月, 2006 1 次提交
    • P
      [PATCH] powerpc: Avoid potential FP corruption with preempt and UP · 5388fb10
      Paul Mackerras 提交于
      Heikki Lindholm pointed out that there was a potential race with the
      lazy CPU state (FP, VR, EVR) stuff if preempt is enabled.  The race
      is that in the process of restoring FP state on sigreturn, the task
      gets preempted by a user task that wants to use the FPU.  It will take
      an FP unavailable exception, which will write the current FPU state
      to the thread_struct, overwriting the values which sigreturn has
      stored.  Note that this can only happen on UP since we don't implement
      lazy CPU state on SMP.
      
      The fix is to flush the lazy CPU state before updating the
      thread_struct.  To do this we re-use the flush_lazy_cpu_state()
      function from process.c.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      5388fb10
  19. 09 1月, 2006 1 次提交
    • D
      [PATCH] syscall entry/exit revamp · 401d1f02
      David Woodhouse 提交于
      This cleanup patch speeds up the null syscall path on ppc64 by about 3%,
      and brings the ppc32 and ppc64 code slightly closer together.
      
      The ppc64 code was checking current_thread_info()->flags twice in the
      syscall exit path; once for TIF_SYSCALL_T_OR_A before disabling
      interrupts, and then again for TIF_SIGPENDING|TIF_NEED_RESCHED etc after
      disabling interrupts. Now we do the same as ppc32 -- check the flags
      only once in the fast path, and re-enable interrupts if necessary in the
      ptrace case.
      
      The patch abolishes the 'syscall_noerror' member of struct thread_info
      and replaces it with a TIF_NOERROR bit in the flags, which is handled in
      the slow path. This shortens the syscall entry code, which no longer
      needs to clear syscall_noerror.
      
      The patch adds a TIF_SAVE_NVGPRS flag which causes the syscall exit slow
      path to save the non-volatile GPRs into a signal frame. This removes the
      need for the assembly wrappers around sys_sigsuspend(),
      sys_rt_sigsuspend(), et al which existed solely to save those registers
      in advance. It also means I don't have to add new wrappers for ppoll()
      and pselect(), which is what I was supposed to be doing when I got
      distracted into this...
      
      Finally, it unifies the ppc64 and ppc32 methods of handling syscall exit
      directly into a signal handler (as required by sigsuspend et al) by
      introducing a TIF_RESTOREALL flag which causes _all_ the registers to be
      reloaded from the pt_regs by taking the ret_from_exception path, instead
      of the normal syscall exit path which stomps on the callee-saved GPRs.
      
      It appears to pass an LTP test run on ppc64, and passes basic testing on
      ppc32 too. Brief tests of ptrace functionality with strace and gdb also
      appear OK. I wouldn't send it to Linus for 2.6.15 just yet though :)
      Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      401d1f02
  20. 15 11月, 2005 1 次提交
    • P
      powerpc: Fix clearing of the FPSCR when invoking a signal handler · cc657f53
      Paul Mackerras 提交于
      As pointed out by Gary Byers, we were clearing the image of the FPSCR
      (floating point status and control register) in the thread_struct before
      copying it to the user stack when invoking a signal.  Thus the task
      would see its FPSCR getting cleared when it took a signal.
      
      While fixing it I noticed that our swapcontext system call was also
      clearing FPSCR.  It shouldn't, so I fixed that too.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      cc657f53
  21. 07 11月, 2005 1 次提交
    • D
      [PATCH] powerpc: Kill ppcdebug · dcad47fc
      David Gibson 提交于
      The ancient ppcdebug/PPCDBG mechanism is now only used in two places.
      First, in the hash setup code, one of the bits allows the size of the
      hash table to be reduced by a factor of 8 - which would be better
      accomplished with a command line option for that purpose.  The other
      was a bunch of bus walking related messages in the iSeries code, which
      would seem to be insufficient reason to keep the mechanism.
      
      This patch removes the last traces of this mechanism.
      
      Built and booted on iSeries and pSeries POWER5 LPAR (ARCH=powerpc).
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      dcad47fc
  22. 03 11月, 2005 1 次提交
  23. 27 10月, 2005 1 次提交
    • D
      [PATCH] powerpc: Fix handling of fpscr on 64-bit · 25c8a78b
      David Gibson 提交于
      The recent merge of fpu.S broken the handling of fpscr for
      ARCH=powerpc and CONFIG_PPC64=y.  FP registers could be corrupted,
      leading to strange random application crashes.
      
      The confusion arises, because the thread_struct has (and requires) a
      64-bit area to save the fpscr, because we use load/store double
      instructions to get it in to/out of the FPU.  However, only the low
      32-bits are actually used, so we want to treat it as a 32-bit quantity
      when manipulating its bits to avoid extra load/stores on 32-bit.  This
      patch replaces the current definition with a structure of two 32-bit
      quantities (pad and val), to clarify things as much as is possible.
      The 'val' field is used when manipulating bits, the structure itself
      is used when obtaining the address for loading/unloading the value
      from the FPU.
      
      While we're at it, consolidate the 4 (!) almost identical versions of
      cvt_fd() and cvt_df() (arch/ppc/kernel/misc.S,
      arch/ppc64/kernel/misc.S, arch/powerpc/kernel/misc_32.S,
      arch/powerpc/kernel/misc_64.S) into a single version in fpu.S.  The
      new version takes a pointer to thread_struct and applies the correct
      offset itself, rather than a pointer to the fpscr field itself, again
      to avoid confusion as to which is the correct field to use.
      
      Finally, this patch makes ARCH=ppc64 also use the consolidated fpu.S
      code, which it previously did not.
      
      Built for G5 (ARCH=ppc64 and ARCH=powerpc), 32-bit powermac (ARCH=ppc
      and ARCH=powerpc) and Walnut (ARCH=ppc, CONFIG_MATH_EMULATION=y).
      Booted on G5 (ARCH=powerpc) and things which previously fell over no
      longer do.
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      25c8a78b
  24. 12 9月, 2005 1 次提交
  25. 30 8月, 2005 1 次提交
    • S
      [PATCH] convert signal handling of NODEFER to act like other Unix boxes. · 69be8f18
      Steven Rostedt 提交于
      It has been reported that the way Linux handles NODEFER for signals is
      not consistent with the way other Unix boxes handle it.  I've written a
      program to test the behavior of how this flag affects signals and had
      several reports from people who ran this on various Unix boxes,
      confirming that Linux seems to be unique on the way this is handled.
      
      The way NODEFER affects signals on other Unix boxes is as follows:
      
      1) If NODEFER is set, other signals in sa_mask are still blocked.
      
      2) If NODEFER is set and the signal is in sa_mask, then the signal is
      still blocked. (Note: this is the behavior of all tested but Linux _and_
      NetBSD 2.0 *).
      
      The way NODEFER affects signals on Linux:
      
      1) If NODEFER is set, other signals are _not_ blocked regardless of
      sa_mask (Even NetBSD doesn't do this).
      
      2) If NODEFER is set and the signal is in sa_mask, then the signal being
      handled is not blocked.
      
      The patch converts signal handling in all current Linux architectures to
      the way most Unix boxes work.
      
      Unix boxes that were tested:  DU4, AIX 5.2, Irix 6.5, NetBSD 2.0, SFU
      3.5 on WinXP, AIX 5.3, Mac OSX, and of course Linux 2.6.13-rcX.
      
      * NetBSD was the only other Unix to behave like Linux on point #2. The
      main concern was brought up by point #1 which even NetBSD isn't like
      Linux.  So with this patch, we leave NetBSD as the lonely one that
      behaves differently here with #2.
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      69be8f18
  26. 06 5月, 2005 1 次提交
  27. 17 4月, 2005 1 次提交
    • L
      Linux-2.6.12-rc2 · 1da177e4
      Linus Torvalds 提交于
      Initial git repository build. I'm not bothering with the full history,
      even though we have it. We can create a separate "historical" git
      archive of that later if we want to, and in the meantime it's about
      3.2GB when imported into git - space that would just make the early
      git days unnecessarily complicated, when we don't have a lot of good
      infrastructure for it.
      
      Let it rip!
      1da177e4