1. 09 9月, 2005 7 次提交
    • B
      [PATCH] PCI/libata INTx cleanup · a04ce0ff
      Brett M Russ 提交于
      Simple cleanup to eliminate X copies of the pci_enable_intx() function
      in libata.  Moved ahci.c's pci_intx() to pci.c and use it throughout
      libata and msi.c.
      Signed-off-by: NBrett Russ <russb@emc.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      a04ce0ff
    • D
      [PATCH] PCI: Support PCM PM CAP version 3 · 3fe9d19f
      Daniel Ritz 提交于
      - support PCI PM CAP version 3 (as defined in PCI PM Interface Spec v1.2)
      
      - pci/probe.c sets the PM state initially to 4 which is D3cold.  add a
        PCI_UNKNOWN
      
      - minor cleanups
      Signed-off-by: NDaniel Ritz <daniel.ritz@gmx.ch>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      3fe9d19f
    • P
      [PATCH] PCI: Add pci_walk_bus function to PCI core (nonrecursive) · cecf4864
      Paul Mackerras 提交于
      The PCI error recovery infrastructure needs to be able to contact all
      the drivers affected by a PCI error event, which may mean traversing
      all the devices under a given PCI-PCI bridge.  This patch adds a
      function to the PCI core that traverses all the PCI devices on a PCI
      bus and under any PCI-PCI bridges on that bus (and so on), calling a
      given function for each device.  This provides a way for the error
      recovery code to iterate through all devices that are affected by an
      error event.
      
      This version is not implemented as a recursive function.  Instead,
      when we reach a PCI-PCI bridge, we set the pointers to start doing the
      devices on the bus under the bridge, and when we reach the end of a
      bus's devices, we use the bus->self pointer to go back up to the next
      higher bus and continue doing its devices.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      cecf4864
    • J
      [PATCH] PCI: restore BAR values after D3hot->D0 for devices that need it · 064b53db
      John W. Linville 提交于
      Some PCI devices (e.g. 3c905B, 3c556B) lose all configuration
      (including BARs) when transitioning from D3hot->D0.  This leaves such
      a device in an inaccessible state.  The patch below causes the BARs
      to be restored when enabling such a device, so that its driver will
      be able to access it.
      
      The patch also adds pci_restore_bars as a new global symbol, and adds a
      correpsonding EXPORT_SYMBOL_GPL for that.
      
      Some firmware (e.g. Thinkpad T21) leaves devices in D3hot after a
      (re)boot.  Most drivers call pci_enable_device very early, so devices
      left in D3hot that lose configuration during the D3hot->D0 transition
      will be inaccessible to their drivers.
      
      Drivers could be modified to account for this, but it would
      be difficult to know which drivers need modification.  This is
      especially true since often many devices are covered by the same
      driver.  It likely would be necessary to replicate code across dozens
      of drivers.
      
      The patch below should trigger only when transitioning from D3hot->D0
      (or at boot), and only for devices that have the "no soft reset" bit
      cleared in the PM control register.  I believe it is safe to include
      this patch as part of the PCI infrastructure.
      
      The cleanest implementation of pci_restore_bars was to call
      pci_update_resource.  Unfortunately, that does not currently exist
      for the sparc64 architecture.  The patch below includes a null
      implemenation of pci_update_resource for sparc64.
      
      Some have expressed interest in making general use of the the
      pci_restore_bars function, so that has been exported to GPL licensed
      modules.
      Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      064b53db
    • G
      [PATCH] PCI: clean up pci.h and split pci register info to separate header file. · 4352dfd5
      Greg Kroah-Hartman 提交于
      This cleans up some of the #ifdef CONFIG_PCI stuff up, and moves the pci register
      info out to a separate file, where it belongs.  Eventually we can stop including
      this file from within pci.h, but lots of code needs to be audited first.
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      4352dfd5
    • A
      [PATCH] PCI: remove CONFIG_PCI_NAMES · 982245f0
      Adrian Bunk 提交于
      This patch removes CONFIG_PCI_NAMES.
      Signed-off-by: NAdrian Bunk <bunk@stusta.de>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      982245f0
    • A
      [PATCH] PCI: Move PCI fixup data into r/o section · 74d863ee
      akpm@osdl.org 提交于
      Make PCI fixup data const, so it'll end up in a r/o section.
      
      This also fixes the conversion into ECOFF which gets broken by too many
      changes between r/w and r/o sections.  Call it a hack but it's a change
      that's correct by itself.
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      74d863ee
  2. 17 8月, 2005 1 次提交
  3. 09 8月, 2005 1 次提交
  4. 05 8月, 2005 1 次提交
    • J
      [PATCH] PCI: restore BAR values after D3hot->D0 for devices that need it · fec59a71
      John W. Linville 提交于
      Some PCI devices (e.g. 3c905B, 3c556B) lose all configuration
      (including BARs) when transitioning from D3hot->D0.  This leaves such
      a device in an inaccessible state.  The patch below causes the BARs
      to be restored when enabling such a device, so that its driver will
      be able to access it.
      
      The patch also adds pci_restore_bars as a new global symbol, and adds a
      correpsonding EXPORT_SYMBOL_GPL for that.
      
      Some firmware (e.g. Thinkpad T21) leaves devices in D3hot after a
      (re)boot.  Most drivers call pci_enable_device very early, so devices
      left in D3hot that lose configuration during the D3hot->D0 transition
      will be inaccessible to their drivers.
      
      Drivers could be modified to account for this, but it would
      be difficult to know which drivers need modification.  This is
      especially true since often many devices are covered by the same
      driver.  It likely would be necessary to replicate code across dozens
      of drivers.
      
      The patch below should trigger only when transitioning from D3hot->D0
      (or at boot), and only for devices that have the "no soft reset" bit
      cleared in the PM control register.  I believe it is safe to include
      this patch as part of the PCI infrastructure.
      
      The cleanest implementation of pci_restore_bars was to call
      pci_update_resource.  Unfortunately, that does not currently exist
      for the sparc64 architecture.  The patch below includes a null
      implemenation of pci_update_resource for sparc64.
      
      Some have expressed interest in making general use of the the
      pci_restore_bars function, so that has been exported to GPL licensed
      modules.
      Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      fec59a71
  5. 30 7月, 2005 1 次提交
  6. 02 7月, 2005 2 次提交
    • G
      [PATCH] PCI: clean up dynamic pci id logic · 75865858
      Greg Kroah-Hartman 提交于
      The dynamic pci id logic has been bothering me for a while, and now that
      I started to look into how to move some of this to the driver core, I
      thought it was time to clean it all up.
      
      It ends up making the code smaller, and easier to follow, and fixes a
      few bugs at the same time (dynamic ids were not being matched
      everywhere, and so could be missed on some call paths for new devices,
      semaphore not needed to be grabbed when adding a new id and calling the
      driver core, etc.)
      
      I also renamed the function pci_match_device() to pci_match_id() as
      that's what it really does.
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      75865858
    • R
      [PATCH] PCI: Increase the number of PCI bus resources · a03fa955
      rajesh.shah@intel.com 提交于
      This patch increases the number of resource pointers in the
      pci_bus structure. This is needed to store >4 resource ranges
      for host bridges and transparent PCI bridges. With this change,
      all PCI buses will have more resource pointers, but most PCI
      buses will only use the first 3 or 4, the remaining being NULL.
      The PCI core already deals with this correctly.
      Signed-off-by: NRajesh Shah <rajesh.shah@intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      a03fa955
  7. 28 6月, 2005 4 次提交
    • A
      [PATCH] PCI: fix up errors after dma bursting patch and CONFIG_PCI=n · bb4a61b6
      Andrew Morton 提交于
      With CONFIG_PCI=n:
      
      In file included from include/linux/pci.h:917,
                       from lib/iomap.c:6:
      include/asm/pci.h:104: warning: `enum pci_dma_burst_strategy' declared inside parameter list
      include/asm/pci.h:104: warning: its scope is only this definition or declaration, which is probably not what you want.
      include/asm/pci.h: In function `pci_dma_burst_advice':
      include/asm/pci.h:106: dereferencing pointer to incomplete type
      include/asm/pci.h:106: `PCI_DMA_BURST_INFINITY' undeclared (first use in this function)
      include/asm/pci.h:106: (Each undeclared identifier is reported only once
      include/asm/pci.h:106: for each function it appears in.)
      make[1]: *** [lib/iomap.o] Error 1
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      bb4a61b6
    • D
      [PATCH] PCI: DMA bursting advice · e24c2d96
      David S. Miller 提交于
      After seeing, at best, "guesses" as to the following kind
      of information in several drivers, I decided that we really
      need a way for platforms to specifically give advice in this
      area for what works best with their PCI controller implementation.
      
      Basically, this new interface gives DMA bursting advice on
      PCI.  There are three forms of the advice:
      
      1) Burst as much as possible, it is not necessary to end bursts
         on some particular boundary for best performance.
      
      2) Burst on some byte count multiple.  A DMA burst to some multiple of
         number of bytes may be done, but it is important to end the burst
         on an exact multiple for best performance.
      
         The best example of this I am aware of are the PPC64 PCI
         controllers, where if you end a burst mid-cacheline then
         chip has to refetch the data and the IOMMU translations
         which hurts performance a lot.
      
      3) Burst on a single byte count multiple.  Bursts shall end
         exactly on the next multiple boundary for best performance.
      
         Sparc64 and Alpha's PCI controllers operate this way.  They
         disconnect any device which tries to burst across a cacheline
         boundary.
      
         Actually, newer sparc64 PCI controllers do not have this behavior.
         That is why the "pdev" is passed into the interface, so I can
         add code later to check which PCI controller the system is using
         and give advice accordingly.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      e24c2d96
    • M
      [PATCH] PCI: fix-pci-mmap-on-ppc-and-ppc64.patch · 2311b1f2
      Michael Ellerman 提交于
      This is an updated version of Ben's fix-pci-mmap-on-ppc-and-ppc64.patch
      which is in 2.6.12-rc4-mm1.
      
      It fixes the patch to work on PPC iSeries, removes some debug printks
      at Ben's request, and incorporates your
      fix-pci-mmap-on-ppc-and-ppc64-fix.patch also.
      
      Originally from Benjamin Herrenschmidt <benh@kernel.crashing.org>
      
      This patch was discussed at length on linux-pci and so far, the last
      iteration of it didn't raise any comment.  It's effect is a nop on
      architecture that don't define the new pci_resource_to_user() callback
      anyway.  It allows architecture like ppc who put weird things inside of
      PCI resource structures to convert to some different value for user
      visible ones.  It also fixes mmap'ing of IO space on those archs.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      2311b1f2
    • R
      [PATCH] acpi bridge hotadd: ACPI based root bridge hot-add · c431ada4
      Rajesh Shah 提交于
      When you hot-plug a (root) bridge hierarchy, it may have p2p bridges and
      devices attached to it that have not been configured by firmware.  In this
      case, we need to configure the devices before starting them.  This patch
      separates device start from device scan so that we can introduce the
      configuration step in the middle.
      
      I kept the existing semantics for pci_scan_bus() since there are a huge number
      of callers to that function.
      
      Also, I have no way of testing the changes I made to the parisc files, so this
      needs review by those folks.  Sorry for the massive cross-post, this touches
      files in many different places.
      Signed-off-by: NRajesh Shah <rajesh.shah@intel.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      c431ada4
  8. 04 5月, 2005 2 次提交
  9. 17 4月, 2005 2 次提交
    • P
      [PATCH] pm_message_t: more fixes in common and i386 · 438510f6
      Pavel Machek 提交于
      I thought I'm done with fixing u32 vs.  pm_message_t ...  unfortunately
      that turned out not to be the case as Russel King pointed out.  Here are
      fixes for Documentation and common code (mainly system devices).
      Signed-off-by: NPavel Machek <pavel@suse.cz>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      438510f6
    • L
      Linux-2.6.12-rc2 · 1da177e4
      Linus Torvalds 提交于
      Initial git repository build. I'm not bothering with the full history,
      even though we have it. We can create a separate "historical" git
      archive of that later if we want to, and in the meantime it's about
      3.2GB when imported into git - space that would just make the early
      git days unnecessarily complicated, when we don't have a lot of good
      infrastructure for it.
      
      Let it rip!
      1da177e4