Device tree naming conventions state that node names should match
node function. Change fully functioning clock nodes to match and
add clock-output-names to all sunxi clock nodes.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The A31 has 4 SPI controllers. Add them in the DTSI.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The module clocks in the A31 are still compatible with the A10 one. Add the SPI
module clocks and the PLL6 in the device tree to allow their use by the SPI
controllers.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Some UART aliases have been defined, but not all of them. Add the remaining
ones to be consistent and to ease the parsing of the DT by the bootloaders.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Add the PRCM and CPU configuration units needed for SMP in the A31 DTSI.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The Allwinner A31 uses the ARM GIC as its internal interrupts controller. The
GIC can work on several interrupt triggers, and the A31 was actually setting it
up to use a rising edge as a trigger, while it was actually a level high
trigger, leading to some interrupts that would be completely ignored if the
edge was missed.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: NHans de Goede <hdegoede@redhat.com>
Cc: stable@vger.kernel.org # 3.12+
Signed-off-by: NOlof Johansson <olof@lixom.net>

The A31 has a reset controller IP that maintains a few other IPs in
reset, among which we can find the UARTs, high speed timers or the I2C.
Now that we have support for them, add the reset controllers to the DTSI.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: NPhilipp Zabel <p.zabel@pengutronix.de>

The APB2 clocks gates are only a 32 bits register wide, and not 2 as set
currently in the DTSI.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Now that the clock driver has support for the A31 clocks, we can add
them to the DTSI and start using them in the relevant hardware blocks.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The A31 has a different set of pins than the one found on the A10 and
A13. Now that we have support for the A31 pin set in the pinctrl driver,
we can enable it in the DTSI with its own compatible.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The Allwinner A31 SoC is a multimedia SoC powered by 4 Cortex-A7 and a
PowerVR GPU.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>