handle_bad_irq() expects the IRQ number to be valid (used for statistics),
so it cannot be called with an illegal vector. The problem was reported
by a static analysis tool.

The change makes bad_irq_desc redundant, so delete it.
Signed-off-by: NAaro Koskinen <aaro.koskinen@nokia.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch fixes two errors we get when building GTA02 kernel.

~ use_bbt is incorrect, we need flash_bbt.

~ We do not need .force_soft_ecc because we can unset
  CONFIG_MTD_NAND_S3C2410_HWECC.
Signed-off-by: NNelson Castillo <arhuaco@freaks-unidos.net>
[ben-linux@fluff.org: updated patch description]
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

The commit 9db41f9e added
the .flash_bbt flag to the nand set, so add this back into
the mach-mini2440.c file (taken out on initial commit to
allow build).
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Add the MINI2440 to the list of machines built by the
central defconfig.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Commit 52da219e added IIS
platform devices, but these do not build on s3c24xx systems
and the file depends on SND_S3C24XX_SOC, which is selected
for all S3C64XX/S3C24XX systems.

As a quick fix, make the dev-audio.o file depends on
SND_S3C64XX_SOC_I2S instead.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Commit 52da219e removed
the s3c_device_iis, but didn't replace it with anything
so a number of s3c24xx machines are currently failing
to build.

As a temporary fix, re-instate s3c_device_iis until a
proper replacement can be done for it.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Remove duplicated #include('s) in
  arch/arm/mach-s3c2440/mach-mini2440.c
Signed-off-by: NHuang Weiyi <weiyi.huang@gmail.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

The commit ec976d6e
removed a number of gpio definitions from <mach/hardware.h>
but misssed updating these two files:

Fix the following build errors by including <linux/gpio.h>:
arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c: In function 's3c24xx_spi_gpiocfg_bus1_gpg5_6_7':
arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c:25: error: implicit declaration of function 's3c2410_gpio_cfgpin'
arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c:28: error: implicit declaration of function 's3c2410_gpio_pullup'
arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c: In function 's3c24xx_spi_gpiocfg_bus0_gpe11_12_13':
arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c:25: error: implicit declaration of function 's3c2410_gpio_cfgpin'
arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c:28: error: implicit declaration of function 's3c2410_gpio_pullup'
Signed-off-by: NBen Dooks <ben@simtec.co.uk>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Otherwise IOMEM calculations can fail.
Signed-off-by: NTony Lindgren <tony@atomide.com>

Remove the unused CONFIG_DEBUG_S3C_PORT as we currently only have
support for using the S3C UARTs via the low-level debug code.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

CONFIG_S3C24XX_PWM was defined in arch/arm/plat-s3c24xx/Kconfig but
not used anywhere else as the corresponding makefile used
CONFIG_HAVE_PWM (selected by CONFIG_S3C24XX_PWM) to compile the PWM
driver.

Change the makefile to use CONFIG_S3C24XX_PWM to compile this driver
to ensure it is only build when needed.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Some bootloader may initialize debounce register and this will make
dbclk not consist with the debounce register after linux kernel boot
up.
Signed-off-by: Njanboe <janboe.ye@gmail.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The function flush_iotlb_page is not loading the CAM register with
the correct entry to be flushed, so it is flushing other entry
Signed-off-by: NFernando Guzman Lugo <x0095840@ti.com>
Signed-off-by: NHiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Use OneNAND sync read / write
Signed-off-by: NAdrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Use async timings when sync timings are not requested.

Also ensure that OneNAND is in async mode when async
timings are used.
Signed-off-by: NAdrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch enables MStandby smart-idle mode, autoidle smartidle mode,
and the autoidle bit for DMA4_OCP_SYSCONFIG.
Signed-off-by: NKalle Jokiniemi <ext-kalle.jokiniemi@nokia.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NKevin Hilman <khilman@ti.deeprootsystems.com>

SRAM size fix for HS/EMU devices
Signed-off-by: NTero Kristo <tero.kristo@nokia.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The omap_type() function is added and returns the DEVICETYPE field of
the CONTROL_STATUS register.  The result can be used for conditional
code based on whether device is GP (general purpose), EMU or
HS (high security). Also move the type defines so omap1 code
compile does not require ifdefs for sections using these defines.

This code is needed for the following fix to set the SRAM
size correctly for HS omaps.  Also at least PM and watchdog
code will need this function.
Signed-off-by: NKevin Hilman <khilman@ti.deeprootsystems.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

platform_get_irq may return -ENXIO. but struct omap_mbox mbox_dsp_info.irq
is unsigned, so the error was not noticed.
Signed-off-by: NRoel Kluin <roel.kluin@gmail.com>
Signed-off-by: NHiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

twl_mmc23_set_power() has MMC2 twl_mmc_controller hardcoded in it, which
breaks MMC3. Find the right controller to use instead.
Signed-off-by: NGrazvydas Ignotas <notasas@gmail.com>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Remove duplicated #include in arch/arm/mach-omap1/board-nokia770.c.
Signed-off-by: NHuang Weiyi <weiyi.huang@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Some of the N770's MMC configuration options seem to have been
dropped. This patch adds them back in again.

Note that only the .ocr_mask change was /critical/, but I've added the
.max_freq setting back as well, as the original sources had it. Can
anyone confirm if this is unnecessary?

Secondly, there is support in the original code for a 4wire/higher
speed mode. As I don't have the requisite N770 hardware (I think it
was a rev2 N770?) to test this, I can't really add it back.
Signed-off-by: NAndrew de Quincey <adq@lidskialf.net>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This fixes the positioning of " in MODULE_AUTHOR, which is currently
causing a build failure on latest git with CONFIG_OMAP_MBOX_FWK=m; the
original breakage appears to date from the end of last year in
a5abbbe52b7e89a7633319c5417bd4331f7ac8ed
Signed-Off-By: NJonathan McDowell <noodles@earth.li>
Acked-by: NHiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

pm_idle is used by infrastructure (eg, cpuidle) which expects architectures
to call it in a certain way.  Arrange for ARM to follow x86's lead on this
and call pm_idle() with interrupts already disabled.  However, we expect
pm_idle() to enable interrupts before it returns.

Also, OMAP wants to be able to disable hlt-ing, so allow hlt_counter to
prevent all calls to pm_idle.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Fix gpio-config off-by-one bug. Without this patch, touching GPA0 pin on
S3C64XX platform causes kernel oops.
Reviewed-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

N group

Add to_irq() function to onvert gpio to irq for external interrupt
group (GPN).
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

The usb-host clock was using the wrong define (the SCLK enable for the
usb-host-bus) to change the HCLK register instead of the HCLK_UHOST bit.
Signed-off-by: NPeter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

A few typos seems to have sneaked into the HCLK gate defines, causing the
usb host clock to not get enabled. Fix them according to the reference
manual and throw in the 3d accel bit for good measure.
Signed-off-by: NPeter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

This allows the callers to now pass down the full set of FAULT_FLAG_xyz
flags to handle_mm_fault().  All callers have been (mechanically)
converted to the new calling convention, there's almost certainly room
for architectures to clean up their code and then add FAULT_FLAG_RETRY
when that support is added.
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

with while (i++ < MAX_CLOCK_ENABLE_WAIT); i can reach MAX_CLOCK_ENABLE_WAIT + 1
after the loop, so if (i == MAX_CLOCK_ENABLE_WAIT) that's still success.
Signed-off-by: NRoel Kluin <roel.kluin@gmail.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Correspondence with the TI OMAP hardware team indicates that
SDRC_DLLA_CTRL.FIXEDDELAY should be initialized to 0x0f.  This number
was apparently derived from process validation.  This is only used
when the SDRC DLL is unlocked (e.g., SDRC clock frequency less than
83MHz).
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Previously only 1 and 2 was supported. This is needed for DVFS VDD2 control.
Signed-off-by: NTero Kristo <tero.kristo@nokia.com>

Convert omap3_sram_configure_core_dpll() to use macros rather than
magic numbers.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Clean up comments and copyrights on the CORE DPLL3 M2 divider change code.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Program the SDRC_MR_0 register as well during SDRC clock changes.
This register allows selection of the memory CAS latency.  Some SDRAM
chips, such as the Qimonda HYB18M512160AF6, have a lower CAS latency
at lower clock rates.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

When changing the SDRAM clock from 166MHz to 83MHz via the CORE DPLL M2
divider, add a short delay before returning to SDRAM to allow the SDRC
time to stabilize.  Without this delay, the system is prone to random
panics upon re-entering SDRAM.

This time delay varies based on MPU frequency.  At 500MHz MPU frequency at
room temperature, 64 loops seems to work okay; so add another 32 loops for
environmental and process variation.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

On the OMAP3, initialize SDRC timings when the kernel boots.  This ensures
that the kernel is running with known, optimized SDRC timings, rather than
whatever was configured by the bootloader.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

The original CDP kernel that this code comes from waited for 0x800
loops after switching the CORE DPLL M2 divider.  This does not appear
to be necessary.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>