The new IFC controller version 2.0 has a different memory map page.
Upto IFC 1.4 PAGE size is 4 KB and from IFC2.0 PAGE size is 64KB.
This patch segregates the IFC global and runtime registers to appropriate
PAGE sizes.
Signed-off-by: NJaiprakash Singh <b44839@freescale.com>
Signed-off-by: NRaghav Dogra <raghav@freescale.com>
Acked-by: NLi Yang <leoyang.li@nxp.com>
Signed-off-by: NRaghav Dogra <raghav.dogra@nxp.com>
Acked-by: NScott Wood <oss@buserror.net>
Acked-by: NBrian Norris <computersforpeace@gmail.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

IFC IO accressor are set at run time based
on IFC IP registers endianness.IFC node in
DTS file contains information about
endianness.
Signed-off-by: NJaiprakash Singh <b44839@freescale.com>
Signed-off-by: NScott Wood <scottwood@freescale.com>
Acked-by: NBrian Norris <computersforpeace@gmail.com>

Freescale's QorIQ T Series processors support 8 IFC chip selects
within a memory map backward compatible with previous P Series
processors which supported only 4 chip selects.
Signed-off-by: NAaron Sierra <asierra@xes-inc.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

According to Freescale manuals, the IFC_CSORn_EXT register is located
immediately _after_ the bank's IFC_CSORn register.

This patch adjusts the csor_ext member of and reserved register arrays
immediately surrounding the csor_cs structure to provide proper access
to this register.
Signed-off-by: NAaron Sierra <asierra@xes-inc.com>
Acked-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: NScott Wood <scottwood@freescale.com>

 Freescale IFC controller has been used for mpc8xxx. It will be used
 for ARM-based SoC as well. This patch moves the driver to driver/memory
 and fix the header file includes.

  Also remove module_platform_driver() and  instead call
  platform_driver_register() from subsys_initcall() to make sure this module
  has been loaded before MTD partition parsing starts.
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Current IFC driver supports till 4K page size NAND flash.
Add support of 8K Page size NAND flash
  - Add nand_ecclayout for 4 bit & 8 bit ecc
  - Defines constants
  - also fix ecc.strength for 8bit ecc of 8K page size NAND
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

Freescale's Integrated Flash controller(IFC) v1.1.0 supports 40 bit
address bus width.
In case more than 32 bit address is used, the EXT registers should be set.

Add support of ext registers.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
Signed-off-by: NYork Sun <yorksun@freescale.com>
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Integrated Flash Controller supports various flashes like NOR, NAND
and other devices using NOR, NAND and GPCM Machine available on it.
IFC supports four chip selects.
Signed-off-by: NDipen Dudhat <Dipen.Dudhat@freescale.com>
Signed-off-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NLi Yang <leoli@freescale.com>
Signed-off-by: NLiu Shuo <b35362@freescale.com>
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>