1. 26 8月, 2009 1 次提交
    • D
      davinci: dm365 gpio irq support · 7a36071e
      David Brownell 提交于
      Support DM365 GPIOs ... primarily by handling non-banked GPIO IRQs:
      
       - Flag DM365 chips as using non-banked GPIO interrupts, using a
         new soc_info field.
      
       - Replace the gpio_to_irq() mapping logic.  This now uses some
         runtime infrastructure, keyed off that new soc_info field,
         which doesn't handle irq_to_gpio().
      
       - Provide a new irq_chip ... GPIO IRQs handled directly by AINTC
         still need edge triggering managed by the GPIO controller.
      
      DM365 chips no longer falsely report 104 GPIO IRQs as they boot.
      
      Intelligence about IRQ muxing is missing, so for the moment this
      only exposes the first eight DM365 GPIOs, which are never muxed.
      The next eight are muxed, half with Ethernet (which uses most of
      those pins anyway).
      
      Tested on DM355 (10 unbanked IRQs _or_ 104 banked ones) and also
      on DM365 (16 unbanked ones, only 8 made available).
      Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
      Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
      7a36071e
  2. 29 5月, 2009 1 次提交
    • M
      davinci: Make GPIO code more generic · a994955c
      Mark A. Greer 提交于
      The current gpio code needs to know the number of
      gpio irqs there are and what the bank irq number is.
      To determine those values, it checks the SoC type.
      
      It also assumes that the base address and the number
      of irqs the interrupt controller uses is fixed.
      
      To clean up the SoC checks and make it support
      different base addresses and interrupt controllers,
      have the SoC-specific code set those values in
      the soc_info structure and have the gpio code
      reference them there.
      Signed-off-by: NMark A. Greer <mgreer@mvista.com>
      Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
      a994955c
  3. 26 5月, 2009 2 次提交
  4. 28 4月, 2009 1 次提交
    • D
      davinci: gpio bugfixes · 474dad54
      David Brownell 提交于
      Update the DaVinci GPIO code to work better on non-dm6446 parts,
      notably the dm355:
      
       - Only handle the number of GPIOs the chip actually has.  So
         for example on dm6467, GPIO-42 is the last GPIO, and trying
         to use GPIO-43 now fails cleanly; or GPIO-72 on dm6446.
      
       - Enable GPIO interrupts on each 16-bit GPIO-irq bank ...
         previously, only the first five were enabled, so GPIO-80
         and above (on dm355) wouldn't trigger IRQs.
      
       - Use the right IRQ for each GPIO bank.  The wrong values were
         used for dm355 chips, so GPIO IRQs got routed incorrectly.
      
       - Handle up to four pairs of 16-bit GPIO banks ... previously
         only three were handled, so accessing GPIO-96 and up (e.g. on
         dm355) would oops.
      
       - Update several comments that were dm6446-specific.
      
      Verified by receiving GPIO-1 (dm9000) and GPIO-5 (msp430) IRQs
      on the DM355 EVM.
      
      One thing this doesn't do is handle the way some of the GPIO
      numbers on dm6467 are reserved but aren't valid as GPIOs.  Some
      bitmap logic could fix that if needed.
      Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
      Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
      474dad54
  5. 09 10月, 2008 1 次提交
  6. 17 9月, 2008 1 次提交
  7. 07 8月, 2008 1 次提交
  8. 12 7月, 2007 1 次提交