- 15 2月, 2014 1 次提交
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由 Greg Kroah-Hartman 提交于
This reverts commit 01ab1167, it is incorrect, a future patch will fix this up properly. Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 08 2月, 2014 2 次提交
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由 Maxime Ripard 提交于
Switch the device tree to the new compatibles introduced in the SID drivers to have a common pattern accross all Allwinner SoCs. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Maxime Ripard 提交于
Switch the device tree touchscreen compatibles to have a common pattern accross all Allwinner SoCs. Since the touchscreen driver has not been merged yet, it has no side effect. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 07 2月, 2014 1 次提交
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由 Maxime Ripard 提交于
Switch the device tree to the new compatibles introduced in the ethernet and mdio drivers to have a common pattern accross all Allwinner SoCs. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 02 1月, 2014 1 次提交
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由 Hans de Goede 提交于
Signed-off-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 29 12月, 2013 4 次提交
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由 Emilio López 提交于
mbus is the memory bus clock, and it is present on both sun5i and sun7i machines. Its register layout is compatible with the mod0 one. Signed-off-by: NEmilio López <emilio@elopez.com.ar> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Emilio López 提交于
This commit adds all the mod0 clocks available on A10 and A13. The list has been constructed by looking at the Allwinner code release for A10S and A13. Signed-off-by: NEmilio López <emilio@elopez.com.ar> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Emilio López 提交于
This commit adds PLL5 and PLL6 nodes to the sun4i, sun5i and sun7i device trees. Signed-off-by: NEmilio López <emilio@elopez.com.ar> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Emilio López 提交于
This commit adds the PLL4 definition to the sun4i, sun5i and sun7i device trees. PLL4 is compatible with PLL1. Signed-off-by: NEmilio López <emilio@elopez.com.ar> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 11 12月, 2013 1 次提交
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由 Maxime Ripard 提交于
The Allwinner A10s has support for two high speed timers. Now that we have a driver to support it, we can enable them in the device tree. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Tested-by: NEmilio López <emilio@elopez.com.ar> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 23 11月, 2013 1 次提交
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由 Emilio López 提交于
U-Boot uses the ethernet0 alias to locate the right node to fill in the MAC address of the first ethernet interface. This patch adds the alias on all the sunxi SoCs with EMAC. In this way, people using ethernet in U-Boot (eg, for tftp) can keep a consistent address on both U-Boot and Linux with no additional effort. Signed-off-by: NEmilio López <emilio@elopez.com.ar> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 17 9月, 2013 1 次提交
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由 Oliver Schinagl 提交于
This patch shall add support for the sunxi-sid driver to the device tree for A10, A10s, A13 and A20. Signed-off-by: NOliver Schinagl <oliver@schinagl.nl> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 26 8月, 2013 1 次提交
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由 Maxime Ripard 提交于
The A10s has only a subset of the A10 gates. Now that the clock driver has support for this gates set, switch to it in the DTSI. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Tested-by: NEmilio López <emilio@elopez.com.ar>
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- 11 8月, 2013 2 次提交
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由 Maxime Ripard 提交于
There was a typo in the base address used for the soc node in the A10s device tree. Fix it with the proper base address. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Maxime Ripard 提交于
The reg property of the simple-bus driver is completely useless. Remove it from the DTSI. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 15 7月, 2013 2 次提交
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由 Emilio López 提交于
Allwinner A10S has 3 I2C controllers embedded on it. Add them to the corresponding dtsi. Signed-off-by: NEmilio López <emilio@elopez.com.ar> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Emilio López 提交于
The information has been extracted from the A10S-OLinuXino-Micro schematics, as we do not have a user manual for A10S yet. Signed-off-by: NEmilio López <emilio@elopez.com.ar> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 17 6月, 2013 1 次提交
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由 Maxime Ripard 提交于
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 15 6月, 2013 2 次提交
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由 Maxime Ripard 提交于
The i2c controller found on the Allwinner A10 has only one muxing option available for each controller. Add them to the dtsi Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NTomasz Figa <tomasz.figa@gmail.com>
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由 Maxime Ripard 提交于
The Allwinner A10 and A13 both have 3 i2c controller embedded. Add those to the common sunxi dtsi. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NTomasz Figa <tomasz.figa@gmail.com>
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- 10 6月, 2013 2 次提交
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由 Maxime Ripard 提交于
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Arnd Bergmann 提交于
A recent series has added CPU numbers to a lot of dts files, but unfortunately in a few cases the #address-cells and #size-cells values are missing, which causes build warnings. This adds the missing ones for sunxi and sama5 that I found through build testing. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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- 01 6月, 2013 2 次提交
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由 Maxime Ripard 提交于
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Tested-by: NRichard Genoud <richard.genoud@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Maxime Ripard 提交于
The EMAC only has one pinset available for muxing, so hopefully, we cover all cases. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Tested-by: NRichard Genoud <richard.genoud@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 23 5月, 2013 1 次提交
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由 Lorenzo Pieralisi 提交于
This patch updates the in-kernel dts files according to the latest cpus and cpu bindings updates for ARM. Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 15 4月, 2013 1 次提交
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由 Emilio López 提交于
Now that the clock driver supports the gatable oscillator as one single clock, drop osc24M_fixed and move the relevant properties to osc24M Signed-off-by: NEmilio López <emilio@elopez.com.ar> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 09 4月, 2013 4 次提交
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由 Maxime Ripard 提交于
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Maxime Ripard 提交于
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Maxime Ripard 提交于
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Maxime Ripard 提交于
In the early days, the A10 and A13 shared quite some code. Nowadays it shares less and less code, the A31 diverging even more, so it doesn't make much sense to continue to maintain this structure, just use one DTSI for every SoC, and that's it. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 05 4月, 2013 2 次提交
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由 Emilio López 提交于
The port controller needs the apb0_pio clock enabled to be able to work. This commit declares that on the device tree. Signed-off-by: NEmilio López <emilio@elopez.com.ar> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Emilio López 提交于
All the UARTs are connected to clock gates; now that our clock driver is able to handle them, make the switch. Signed-off-by: NEmilio López <emilio@elopez.com.ar> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 29 3月, 2013 2 次提交
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由 Maxime Ripard 提交于
The Allwinner A10 SoC has 8 available UARTs, which is 6 more than on the A13, so add the missing UARTs to the sun4i-a10 dtsi. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Acked-by: NEmilio López <emilio@elopez.com.ar>
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由 Maxime Ripard 提交于
The UART0 is only available on the Allwinner A10 SoCs, and not on the A13, so move the uart0 node to sun4i-a10.dtsi. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Acked-by: NEmilio López <emilio@elopez.com.ar> Tested-by: NEmilio López <emilio@elopez.com.ar>
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- 06 3月, 2013 1 次提交
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由 Maxime Ripard 提交于
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 01 2月, 2013 2 次提交
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由 Maxime Ripard 提交于
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Maxime Ripard 提交于
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 21 12月, 2012 1 次提交
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由 Olof Johansson 提交于
This is the rename portion of "ARM: sunxi: Change device tree naming scheme for sunxi" that were missed when the patch was applied. Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 27 11月, 2012 1 次提交
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由 Stefan Roese 提交于
Patch f055f1f6 [ARM: sunxi: Add sun4i and cubieboard support] missed this sun4i.dtsi include file. This patch finally brings it upstream enabling support for sun4i boards. Signed-off-by: NStefan Roese <sr@denx.de> Signed-off-by: NArnd Bergmann <arnd@arndb.de> Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
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- 20 11月, 2012 1 次提交
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由 Stefan Roese 提交于
For the new sun4i/Cubieboard (A10) support, lets re-strucure the sun5i dts files to make it more generic. Those are the new dts/dtsi files: sunxi.dtsi - Devices common to all Allwinner sunXi SoC's sun4i.dtsi - sun4i Devices, will include sunxi.dtsi sun5i.dtsi - sun5i Devices, will include sunxi.dtsi board.dts - will include either sun4i.dtsi or sun5i.dtsi Additionally the "duart" label in the olinuxino.dts is changed to "uart1". Signed-off-by: NStefan Roese <sr@denx.de> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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