- 11 3月, 2010 24 次提交
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由 Michal Simek 提交于
Signed-off-by: NMichal Simek <monstr@monstr.eu>
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由 Michal Simek 提交于
We have to use consistent code to be able to do coherent dma function. In consistent code is used cache inhibit page mapping. Xilinx reported that there is bug in Microblaze for WB and d-cache_always use option. Microblaze 7.30.a should be first version where is this bug removed. Signed-off-by: NMichal Simek <monstr@monstr.eu>
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由 Michal Simek 提交于
Remove ancient Kconfig option for consistent code. MMU uses cache inhibit pages. noMMU uses UNCACHE SHADOW feature where is used double ram size. For example: Physical ram is 256MB and cache are setup to cover the same size. But if you setup in HW that size is 512MB and cache covers 256MB than you can use adresses from 256-512MB without caches and correspond with 0-256MB with cache. That's why I am using dcache base/high addresses to find out uncache area. Signed-off-by: NMichal Simek <monstr@monstr.eu>
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由 Michal Simek 提交于
Consistent functions will be used for noMMU and MMU kernels. Signed-off-by: NMichal Simek <monstr@monstr.eu>
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由 Michal Simek 提交于
We don't use CONSISTENT option from Kconfig that's why I am removing them. Signed-off-by: NMichal Simek <monstr@monstr.eu>
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由 Michal Simek 提交于
Signed-off-by: NMichal Simek <monstr@monstr.eu>
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由 Michal Simek 提交于
It is default option but both options must be measured. Signed-off-by: NMichal Simek <monstr@monstr.eu>
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由 Michal Simek 提交于
I found several problems for ll_temac driver and on system with WB. This early fix should fix it. I will clean this patch before I will add it to mainline Signed-off-by: NMichal Simek <monstr@monstr.eu>
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由 Frans Pop 提交于
Signed-off-by: NFrans Pop <elendil@planet.nl> Cc: microblaze-uclinux@itee.uq.edu.au Cc: Michal Simek <monstr@monstr.eu> Signed-off-by: NMichal Simek <monstr@monstr.eu>
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由 Michal Simek 提交于
Remove arch-specific show_mem() in favor of the generic version. It is based on powerpc patch. bda2fa53Signed-off-by: NMichal Simek <monstr@monstr.eu>
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由 Michal Simek 提交于
For copy was used r7 register when CONFIG_CMDLINE_BOOL option is enabled. But r7 stores pointer to fdt that's why machine_early_init not detect compiled-in DTB. I also moved kernel PID setup to have TLB init in one block Signed-off-by: NMichal Simek <monstr@monstr.eu>
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由 Michal Simek 提交于
I found several problems for ll_temac driver and on system with WB. This early fix should fix it. I will clean this patch before I will add it to mainline Signed-off-by: NMichal Simek <monstr@monstr.eu>
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由 Michal Simek 提交于
It is better to have init cache handling on one place. Signed-off-by: NMichal Simek <monstr@monstr.eu>
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由 Michal Simek 提交于
This patch add core PREEMPT support for Microblaze. I tried to trace it via tracers and I was able to see any output. I also added low level debug functions to see if that code is called. Signed-off-by: NMichal Simek <monstr@monstr.eu>
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由 Michal Simek 提交于
This patch is based on powerpc patch 64f16502 We did some cleanups and removed powerpc parts. There is one new debug early listing function too. Exclude function is only in Debug options. We tested in on custom board. Signed-off-by: NMichal Simek <monstr@monstr.eu>
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由 Michal Simek 提交于
There are two parts of changes. The first is just enable PCI in Makefiles and in Kconfig. The second is the rest of missing files. I didn't want to add it with previous patch because that patch is too big. Current Microblaze toolchain has problem with weak symbols that's why is necessary to apply this changes to be possible to compile pci support. Xilinx knows about this problem. Signed-off-by: NMichal Simek <monstr@monstr.eu>
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由 Michal Simek 提交于
Add pci-common.h and pci32.c. Files are based on PPC version. There are removed ppc specific parts and the code was completely clean. Signed-off-by: NMichal Simek <monstr@monstr.eu>
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由 Michal Simek 提交于
Add pci-bridge.h for Microblaze. It is based on powerpc header file. My changes: I removed PPC_ prefix from constants Removed ppc64 specifis parts Signed-off-by: NMichal Simek <monstr@monstr.eu>
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由 Michal Simek 提交于
Add pci.h for microblaze. It is based on powerpc pci.h Signed-off-by: NMichal Simek <monstr@monstr.eu>
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由 Michal Simek 提交于
I need to use generic/iomap.h for PCI that's why is necessary to include it and fix ioport_{map,unmap} functions. Signed-off-by: NMichal Simek <monstr@monstr.eu>
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由 Michal Simek 提交于
Support function for PCI. We don't use any advance mapping mechanism that's why implementation is simple. Signed-off-by: NMichal Simek <monstr@monstr.eu>
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由 Michal Simek 提交于
I will need {z,}alloc_maybe_bootmem functions for pci patches Signed-off-by: NMichal Simek <monstr@monstr.eu>
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由 Michal Simek 提交于
There is necessary to do some cache handling for dma operations. Signed-off-by: NMichal Simek <monstr@monstr.eu>
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由 Michal Simek 提交于
Add DMA support for Microblaze. There are some part of this new feature: 1. Basic DMA support 2. Enable DMA debug option 3. Setup notifier Ad 1. dma-mapping come from powerpc and x86 version and it is based on generic dma-mapping-common.h Ad 2. DMA support debug features which is used in generic file. For more information please look at Documentation/DMA-API.txt Ad 3. notifier is very important to setup dma_ops. Without this part for example ll_temac driver failed because there are no setup dma operations. Signed-off-by: NMichal Simek <monstr@monstr.eu>
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- 24 2月, 2010 2 次提交
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由 Steven J. Magnani 提交于
Trailing semicolon causes compilation involving out_le32() to fail. Signed-off-by: NSteven J. Magnani <steve@digidescorp.com> Signed-off-by: NMichal Simek <monstr@monstr.eu>
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由 Michal Simek 提交于
I create wrong asm code but none test shows that this part of code is wrong. I am not convinces that were good idea to create asm optimized macros for caches. The reason is that there is not optimization with previous code that's why make sense to add old code and do some benchmarking which functions are faster. Signed-off-by: NMichal Simek <monstr@monstr.eu>
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- 21 2月, 2010 1 次提交
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由 Russell King 提交于
On VIVT ARM, when we have multiple shared mappings of the same file in the same MM, we need to ensure that we have coherency across all copies. We do this via make_coherent() by making the pages uncacheable. This used to work fine, until we allowed highmem with highpte - we now have a page table which is mapped as required, and is not available for modification via update_mmu_cache(). Ralf Beache suggested getting rid of the PTE value passed to update_mmu_cache(): On MIPS update_mmu_cache() calls __update_tlb() which walks pagetables to construct a pointer to the pte again. Passing a pte_t * is much more elegant. Maybe we might even replace the pte argument with the pte_t? Ben Herrenschmidt would also like the pte pointer for PowerPC: Passing the ptep in there is exactly what I want. I want that -instead- of the PTE value, because I have issue on some ppc cases, for I$/D$ coherency, where set_pte_at() may decide to mask out the _PAGE_EXEC. So, pass in the mapped page table pointer into update_mmu_cache(), and remove the PTE value, updating all implementations and call sites to suit. Includes a fix from Stephen Rothwell: sparc: fix fallout from update_mmu_cache API change Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au> Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 15 2月, 2010 1 次提交
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由 Grant Likely 提交于
Neither request_OF_resource or release_OF_resource are defined anywhere. Remove the declarations. Signed-off-by: NGrant Likely <grant.likely@secretlab.ca> Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: NMichal Simek <monstr@monstr.eu>
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- 14 2月, 2010 4 次提交
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由 Grant Likely 提交于
Rather than defining of_chosen in each arch, it can be defined for all in driver/of/base.c Signed-off-by: NGrant Likely <grant.likely@secretlab.ca> Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: NMichal Simek <monstr@monstr.eu>
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由 Grant Likely 提交于
Neither the powerpc nor the microblaze code use devtree_lock anymore. Remove the extern reference. Signed-off-by: NGrant Likely <grant.likely@secretlab.ca> Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: NMichal Simek <monstr@monstr.eu>
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由 Grant Likely 提交于
Most architectures don't need to change these. Put them into common code to eliminate some duplication Signed-off-by: NGrant Likely <grant.likely@secretlab.ca> Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: NMichal Simek <monstr@monstr.eu>
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由 Jeremy Kerr 提交于
We don't always have lmb available, so make arches provide an early_init_dt_alloc_memory_arch() to handle the allocation of memory in the fdt code. When we don't have lmb.h included, we need asm/page.h for __va. Signed-off-by: NJeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca> Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: NMichal Simek <monstr@monstr.eu>
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- 09 2月, 2010 5 次提交
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由 Jeremy Kerr 提交于
At present, the fdt code sets the kernel-wide initrd_start and initrd_end variables when parsing /chosen. On ARM, we only set these once the bootmem has been reserved. This change adds an arch hook to setup the initrd from the device tree: void early_init_dt_setup_initrd_arch(unsigned long start, unsigned long end); The arch-specific code can then setup the initrd however it likes. Compiled on powerpc, with CONFIG_BLK_DEV_INITRD=y and =n. Signed-off-by: NJeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Grant Likely 提交于
Merge common code between PowerPC and Microblaze architectures. Signed-off-by: NGrant Likely <grant.likely@secretlab.ca> Acked-by: NMichal Simek <monstr@monstr.eu>
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由 Jeremy Kerr 提交于
Merge common function between powerpc, sparc and microblaze. Code is identical for powerpc and microblaze, but adds a lock (and release) of the devtree_lock on sparc. Signed-off-by: NJeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Grant Likely 提交于
Merge common code between PowerPC and Microblaze Signed-off-by: NGrant Likely <grant.likely@secretlab.ca> Tested-by: NWolfram Sang <w.sang@pengutronix.de> Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Grant Likely 提交于
Microblaze only has one CPU, it isn't SMP at all. early_init_dt_scan_cpus() is effectively just a no-op, so remove it. Microblaze doesn't support hypervisor assisted dump either, so the phyp stuff can also go. Signed-off-by: NGrant Likely <grant.likely@secretlab.ca> Acked-by: NMichal Simek <monstr@monstr.eu>
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- 08 2月, 2010 1 次提交
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由 Michal Simek 提交于
We found that on write-trough kernel is necessary to do that invalidation. One WB is possible to use invalidation too. Signed-off-by: NMichal Simek <monstr@monstr.eu>
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- 03 2月, 2010 2 次提交
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由 Steven J. Magnani 提交于
Interrupts must be disabled while an interrupt state restore (prep for interrupt return) is in progress. Code to do this was lost in the port to the mainline kernel. Signed-off-by: NSteven J. Magnani <steve@digidescorp.com> Signed-off-by: NMichal Simek <monstr@monstr.eu>
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由 Michal Simek 提交于
There were several changes in Microblaze defconfig that's why is good to update defconfigs. Signed-off-by: NMichal Simek <monstr@monstr.eu>
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