- 08 10月, 2013 1 次提交
-
-
由 Dinh Nguyen 提交于
The SD/MMC clock is named "sdmmc_clk", and NOT "mmc_clk". Because of this, the SD driver was getting the incorrect clock value. This prevented the SD driver from initializing correctly. Signed-off-by: NDinh Nguyen <dinguyen@altera.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Olof Johansson <olof@lixom.net> Reviewed-by: NPavel Machek <pavel@denx.de> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: NMike Turquette <mturquette@linaro.org>
-
- 12 6月, 2013 1 次提交
-
-
由 Dinh Nguyen 提交于
Add support to gate the clocks that directly feed peripherals. For clocks with multiple parents, add the ability to determine the correct parent, and also set parents. Also add support to calculate and set the clocks' rate. Signed-off-by: NDinh Nguyen <dinguyen@altera.com> Reviewed-by: NPavel Machek <pavel@denx.de> Acked-by: NMike Turquette <mturquette@linaro.org> Cc: Mike Turquette <mturquette@linaro.org> CC: Arnd Bergmann <arnd@arndb.de> CC: Olof Johansson <olof@lixom.net> Cc: Pavel Machek <pavel@denx.de> CC: <linux@arm.linux.org.uk> v4: - Add Acked-by: Mike Turquette v3: - Addressed comments from Pavel v2: - Fix space/indent errors - Add streq for strcmp == 0 Signed-off-by: NOlof Johansson <olof@lixom.net>
-
- 15 4月, 2013 1 次提交
-
-
由 Dinh Nguyen 提交于
With this patch, the socfpga clk driver is able to query the clock and clock rates appropriately. Signed-off-by: NDinh Nguyen <dinguyen@altera.com> Reviewed-by: NPavel Machek <pavel@denx.de> Signed-off-by: NOlof Johansson <olof@lixom.net>
-
- 19 7月, 2012 1 次提交
-
-
由 Dinh Nguyen 提交于
Adding core definitions for Altera's SOCFPGA ARM platform. Mininum support for Altera's SOCFPGA Cyclone 5 hardware. Signed-off-by: NDinh Nguyen <dinguyen@altera.com> Reviewed-by: NPavel Machek <pavel@denx.de> Reviewed-by: NRob Herring <rob.herring@calxeda.com> Reviewed-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
-