- 28 1月, 2016 1 次提交
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由 Chen-Yu Tsai 提交于
sunxi_factors_register() does not check for failures or cleanup after clk_register_composite() or other clk-related calls. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 27 1月, 2016 1 次提交
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由 Chen-Yu Tsai 提交于
struct clk_factors_config contains shifts/widths for the factors of the factors clk. This is used to read out the factors from the register value. In no case is it written to, so make it const. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 25 8月, 2015 3 次提交
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由 Stephen Boyd 提交于
We're removing struct clk from the clk provider API, so switch this code to using the clk_hw based provider APIs. Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: "Emilio López" <emilio@elopez.com.ar> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Stephen Boyd 提交于
Mostly converted with the following snippet: @@ struct clk_hw *E; @@ -__clk_get_flags(E->clk) +clk_hw_get_flags(E) Acked-by: NTero Kristo <t-kristo@ti.com> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Max Filippov <jcmvbkbc@gmail.com> Acked-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Daniel Thompson <daniel.thompson@linaro.org> Cc: Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Stephen Boyd 提交于
Mostly converted with the following semantic patch: @@ struct clk_hw *E; @@ -__clk_get_num_parents(E->clk) +clk_hw_get_num_parents(E) Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Cc: Chao Xie <chao.xie@marvell.com> Cc: Krzysztof Kozlowski <k.kozlowski@samsung.com> Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Cc: Tomasz Figa <tomasz.figa@gmail.com> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: "Emilio López" <emilio@elopez.com.ar> Acked-by: NTero Kristo <t-kristo@ti.com> Cc: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 29 7月, 2015 1 次提交
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由 Dinh Nguyen 提交于
Use of_clk_parent_fill to fill in the parent clock names' array. Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Cc: "Emilio López" <emilio@elopez.com.ar> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 28 7月, 2015 2 次提交
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由 Boris Brezillon 提交于
Some determine_rate implementations are not returning an error when they failed to adapt the rate according to the rate request. Fix them so that they return an error instead of silently returning 0. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> CC: Jonathan Corbet <corbet@lwn.net> CC: Tony Lindgren <tony@atomide.com> CC: Ralf Baechle <ralf@linux-mips.org> CC: "Emilio López" <emilio@elopez.com.ar> CC: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Tero Kristo <t-kristo@ti.com> CC: Peter De Schrijver <pdeschrijver@nvidia.com> CC: Prashant Gaikwad <pgaikwad@nvidia.com> CC: Stephen Warren <swarren@wwwdotorg.org> CC: Thierry Reding <thierry.reding@gmail.com> CC: Alexandre Courbot <gnurou@gmail.com> CC: linux-doc@vger.kernel.org CC: linux-kernel@vger.kernel.org CC: linux-arm-kernel@lists.infradead.org CC: linux-omap@vger.kernel.org CC: linux-mips@linux-mips.org CC: linux-tegra@vger.kernel.org Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Boris Brezillon 提交于
Clock rates are stored in an unsigned long field, but ->determine_rate() (which returns a rounded rate from a requested one) returns a long value (errors are reported using negative error codes), which can lead to long overflow if the clock rate exceed 2Ghz. Change ->determine_rate() prototype to return 0 or an error code, and pass a pointer to a clk_rate_request structure containing the expected target rate and the rate constraints imposed by clk users. The clk_rate_request structure might be extended in the future to contain other kind of constraints like the rounding policy, the maximum clock inaccuracy or other things that are not yet supported by the CCF (power consumption constraints ?). Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> CC: Jonathan Corbet <corbet@lwn.net> CC: Tony Lindgren <tony@atomide.com> CC: Ralf Baechle <ralf@linux-mips.org> CC: "Emilio López" <emilio@elopez.com.ar> CC: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: NTero Kristo <t-kristo@ti.com> CC: Peter De Schrijver <pdeschrijver@nvidia.com> CC: Prashant Gaikwad <pgaikwad@nvidia.com> CC: Stephen Warren <swarren@wwwdotorg.org> CC: Thierry Reding <thierry.reding@gmail.com> CC: Alexandre Courbot <gnurou@gmail.com> CC: linux-doc@vger.kernel.org CC: linux-kernel@vger.kernel.org CC: linux-arm-kernel@lists.infradead.org CC: linux-omap@vger.kernel.org CC: linux-mips@linux-mips.org CC: linux-tegra@vger.kernel.org [sboyd@codeaurora.org: Fix parent dereference problem in __clk_determine_rate()] Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Tested-by: NRomain Perier <romain.perier@gmail.com> Signed-off-by: NHeiko Stuebner <heiko@sntech.de> [sboyd@codeaurora.org: Folded in fix from Heiko for fixed-rate clocks without parents or a rate determining op] Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 03 2月, 2015 1 次提交
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由 Tomeu Vizoso 提交于
Adds a way for clock consumers to set maximum and minimum rates. This can be used for thermal drivers to set minimum rates, or by misc. drivers to set maximum rates to assure a minimum performance level. Changes the signature of the determine_rate callback by adding the parameters min_rate and max_rate. Signed-off-by: NTomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> [sboyd@codeaurora.org: set req_rate in __clk_init] Signed-off-by: NMichael Turquette <mturquette@linaro.org> [mturquette@linaro.org: min/max rate for sun6i_ahb1_clk_determine_rate migrated clk-private.h changes to clk.c]
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- 22 12月, 2014 1 次提交
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由 Hans de Goede 提交于
Before this commit sunxi_factors_register uses of_iomap(node, 0) to get the clk registers. The sun6i prcm has factor clocks, for which we want to use sunxi_factors_register, but of_iomap(node, 0) does not work for the prcm factor clocks, because the prcm uses the mfd framework, so the registers are not part of the dt-node, instead they are added to the platform_device, as platform_device resources. This commit makes getting the registers the callers duty, so that sunxi_factors_register can be used with mfd instantiated platform device too. While at it also add error checking to the of_iomap calls. This commit also drops the __init function from sunxi_factors_register since platform driver probe functions are not __init. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 04 12月, 2014 1 次提交
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由 Tomeu Vizoso 提交于
This is in preparation for clock providers to not have to deal with struct clk. Signed-off-by: NTomeu Vizoso <tomeu.vizoso@collabora.com> Reviewed-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NMichael Turquette <mturquette@linaro.org>
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- 22 10月, 2014 1 次提交
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由 Chen-Yu Tsai 提交于
Some of the factors-style clocks on the A80 have different widths for the mux values in the registers. Add a .muxmask field to clk_factors_config to make it configurable. Passing a bitmask instead of a width parameter will allow reuse in case we support table-based muxes in the future. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 27 9月, 2014 1 次提交
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由 Maxime Ripard 提交于
Until now, the factors clock probing was done directly by sunxi_init_clocks, with the factors registration being called directly with the clocks data passed as an argument. This approch has shown its limits when we added more clocks, since we couldn't really split code with such a logic in smaller files, and led to a huge file having all the clocks. Introduce an intermediate probing function, so that factor clocks will be able to directly be called by CLK_OF_DECLARE, which will in turn ease the split into several files. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Acked-by: NHans de Goede <hdegoede@redhat.com>
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- 04 7月, 2014 1 次提交
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由 Chen-Yu Tsai 提交于
The PLLs on newer Allwinner SoC's, such as the A31 and A23, have a N multiplier factor that starts from 1, not 0. This patch adds an option to the factor clk driver's config data structures to specify the base value of N. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 06 5月, 2014 1 次提交
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由 Emilio López 提交于
This commit implements .determine_rate, so that our factor clocks can be reparented when needed. Signed-off-by: NEmilio López <emilio@elopez.com.ar> Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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- 29 12月, 2013 1 次提交
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由 Emilio López 提交于
This commit reworks factors clock registration to be done behind a composite clock. This allows us to additionally add a gate, mux or divisors, as it will be needed by some future PLLs. Signed-off-by: NEmilio López <emilio@elopez.com.ar> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Acked-by: NMike Turquette <mturquette@linaro.org>
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- 10 11月, 2013 2 次提交
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由 Emilio López 提交于
Random bits may get into our factors if we don't clear n, k, m and p. Signed-off-by: NEmilio López <emilio@elopez.com.ar> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Emilio López 提交于
The previous code would generate one bit too long masks, and was needlessly complicated. This patch replaces it by simpler code that can generate the masks correctly. Signed-off-by: NEmilio López <emilio@elopez.com.ar> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 27 3月, 2013 1 次提交
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由 Emilio López 提交于
This commit implements the base CPU clocks for sunxi devices. It has been tested using a slightly modified cpufreq driver from the linux-sunxi 3.0 tree. Additionally, document the new bindings introduced by this patch. Idling: / # cat /sys/kernel/debug/clk/clk_summary clock enable_cnt prepare_cnt rate --------------------------------------------------------------------- osc32k 0 0 32768 osc24M_fixed 0 0 24000000 osc24M 0 0 24000000 apb1_mux 0 0 24000000 apb1 0 0 24000000 pll1 0 0 60000000 cpu 0 0 60000000 axi 0 0 60000000 ahb 0 0 60000000 apb0 0 0 30000000 dummy 0 0 0 After "yes >/dev/null &": / # cat /sys/kernel/debug/clk/clk_summary clock enable_cnt prepare_cnt rate --------------------------------------------------------------------- osc32k 0 0 32768 osc24M_fixed 0 0 24000000 osc24M 0 0 24000000 apb1_mux 0 0 24000000 apb1 0 0 24000000 pll1 0 0 1008000000 cpu 0 0 1008000000 axi 0 0 336000000 ahb 0 0 168000000 apb0 0 0 84000000 dummy 0 0 0 Signed-off-by: NEmilio López <emilio@elopez.com.ar> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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