WCH382 2S board is a PCIe card with 2 DB9 COM ports detected as
Serial controller: Device 1c00:3253 (rev 10) (prog-if 05 [16850])
Signed-off-by: NJeremy McNicoll <jmcnicol@redhat.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Some recent (early 2015) macbooks have Intel Broadwell where LPSS UARTs are
PCI enumerated instead of ACPI. The LPSS UART block is pretty much same as
used on Intel Baytrail so we can reuse the existing Baytrail setup code.

Add both Broadwell LPSS UART ports to the list of supported devices.
Signed-off-by: NLeif Liddy <leif.liddy@gmail.com>
Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The platforms that have this UART, but that don't have
separate PCI device for the DMA Engine, need to create the
HSU DMA Engine device separately.
Signed-off-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Intel MID UART quirks require already quite a bit of code
in 8250_pci.c. On new Intel platforms where it is used, the
integrated DMA engine no longer has its own PCI device, but
is instead configured from the UART's MMIO. That means we
will have to add even more code for handling just MID UARTs.

Instead of adding that to 8250_pci.c, splitting the support
of Intel MID UART into its own driver. Handling of the
integrated DMA engine becomes much simpler this way. Own
driver will also remove the need for things like specific
set_termios hooks for every board using this UART, and
simplify the handling of it in general.
Signed-off-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Fix RS232/485 mode incorrect setting after S3/S4 resume for F81504/508/512

We had add RS232/485 RTS control with fecf27a3. But when it
resume from S3/S4, the mode register 0x40 + 0x08 * idx + 7 will
rewrite to 0x01 (RS232 mode).

This patch will modify 2 sections.

One is pci_fintek_init(), if it called when first init, it will
write mode register with 0x01. If it called from S3/S4 resume,
it's will get the relative port data and pass it to
pci_fintek_rs485_config() with NULL rs485 parameter.

The another modification is in pci_fintek_rs485_config(). It'll
re-apply old configuration when the parameter rs485 is NULL.
Signed-off-by: NPeter Hung <hpeter+linux_kernel@gmail.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Pericom PI7C9X795[1248] are Uno/Dual/Quad/Octal UART devices, this
patch enables them, also defines PCI_VENDOR_ID_PERICOM here.
Signed-off-by: NAdam Lee <adam.lee@canonical.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

According to DesignWare 8250 spec, if auto flow control
mode is enabled, a change in CTS does not cause an interrupt,
so sw-assisted CTS flow control mode will not work properly.

There reported an GPS firmware download failure issue, and we
verified the root cause is, the default sw-assisted CTS flow
control mode can not work properly since no interrupt when got
CTS signal.

This patch is to enable auto CTS mode by defaut if CRTSCTS
is enable for DesignWare 8250 controller.
Signed-off-by: NHuiquan Zhong <huiquan.zhong@intel.com>
Signed-off-by: NQipeng Zha <qipeng.zha@intel.com>
Reviewed-by: NPeter Hurley <peter@hurleysoftware.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Add RS485 control for Fintek F81504/508/512

F81504/508/512 can control their RTS with H/W mode.
PCI configuration space for each port is 0x40 + idx * 8 + 7.

When it set with 0x01, it's configured with RS232 mode.
RTS is controlled by MCR.

When it set with 0x11, it's configured with RS485 mode.
RTS is controlled by H/W, RTS low with idle & RX, high with TX.

When it set with 0x31, it's configured with RS485 mode.
RTS is controlled by H/W, RTS high with idle & RX, low with TX.

We will force 0x01 on pci_fintek_setup().
Signed-off-by: NPeter Hung <hpeter+linux_kernel@gmail.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The internal clock of the master chip, which is usually 125MHz, is only half
(62.5MHz) for the slave chips. So we have to adjust the uartclk for all the
slave ports. Therefor we add a new function to determine if a slave chip is
present and update pci_xr17v35x_setup accordingly.
Signed-off-by: NSoeren Grunewald <soeren.grunewald@desy.de>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The Exar XR17V358 can also be combined with a XR17V354 chip to act as a
single 12 port chip. This works the same way as the combining two XR17V358
chips. But the reported device id then is 0x4358.
Signed-off-by: NSoeren Grunewald <soeren.grunewald@desy.de>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The Exar XR17V358 chip usually provides only 8 ports. But two chips can be
combined to act as a single 16 port chip. Therefor one chip is configured
as master the second as slave by connecting the mode pin to VCC (master)
or GND (slave).

Then the master chip is reporting a different device-id depending on
whether a slave is detected or not. The UARTs 8-15 are addressed from
0x2000-0x3fff. So the offset of 0x400 from UART to UART can be used to
address all 16 ports as before.

See: https://www.exar.com/common/content/document.ashx?id=1587 page 11
Signed-off-by: NSoeren Grunewald <soeren.grunewald@desy.de>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Serial ports of F81504/F81508/F81512 will failed when wakeup from S3(STR).

It's due to when the system wakeup from S3(STR), this PCI device's
configuration space from 0x40 to 0x40 + max_port * 0x08 should be
re-configured.

We move all initialization from pci_fintek_setup() to pci_fintek_init() and
set it to pci_serial_quirks .init section. It's will re-init this device when
system wakeup from pciserial_resume_ports().
Signed-off-by: NPeter Hung <hpeter+linux_kernel@gmail.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Intel Tangier contains 4 HSUART ports as found on Intel Edison board which are
8250 compatible. The patch adds necessary bits to the driver.

Note that the HSU port0 is currently unavailable and thus not supported.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

This patch replaces a switch-case by a formula using rational best
approximation that does necessary calculations for intel_mid_set_termios().

Below is a list of the calculations done for all defined baud rates. Each line
in a format: 1) nominator, 2) denominator, 3) prescaler, 4) Fuart, 5) port UART
clock, 6) list of baud rates with DLAB values.

24       25       12 48000000   64000000   4000000(1)
49       50       14 49000000   56000000   3500000(1)
4        5        16 40000000   40000000   2500000(1)
16       25       16 32000000   32000000   500000(4),1000000(2),2000000(1)
24       25       16 48000000   48000000   1500000(2),3000000(1)
2304     3125     16 36864000   36864000   576000(4),1152000(2)
8192     15625    16 26214400   26214400   50(32768),200(8192)
9216     15625    16 29491200   29491200   1800(1024),57600(32),115200(16),
					230400(8),460800(4),921600(2),1843200(1)
12288    15625    16 39321600   39321600   75(32768),150(16384),300(8192),
					600(4096),1200(2048),2400(1024),4800(512),
					9600(256),19200(128),38400(64)
45056    78125    16 28835840   28835840   110(16384)
274432   390625   16 35127296   35127296   134(16384)
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: NPeter Hurley <peter@hurleysoftware.com>
Reviewed-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

This patch replaces a switch-case by a formula using rational best
approximation that does necessary calculations for byt_set_termios().

Below is a list of the calculations done for all defined baud rates. Each line
in a format: 1) numerator, 2) denominator, 3) prescaler, 4) Fuart, 5) port UART
clock, 6) list of baud rates with DLAB values.

4        5        16 80000000   80000000   2500000(2)
14       25       16 56000000   56000000   3500000(1)
16       25       16 64000000   64000000   500000(8),1000000(4),2000000(2),
					4000000(1)
24       25       16 96000000   96000000   1500000(4),3000000(2)
2180     3103     16 70254592   70254592   134(32768)
2304     3125     16 73728000   73728000   576000(8),1152000(4)
8192     15625    16 52428800   52428800   50(65536),200(16384)
9216     15625    16 58982400   58982400   1800(2048),57600(64),115200(32),
					230400(16),460800(8),921600(4),1843200(2)
12288    15625    16 78643200   78643200   75(65536),150(32768),300(16384),
					600(8192),1200(4096),2400(2048),
					4800(1024),9600(512),19200(256),38400(128)
9893     17154    16 57671680   57671680   110(32768)
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: NPeter Hurley <peter@hurleysoftware.com>
Reviewed-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Remove pci_fintek_setup() non-used var with calculation ciobase
Signed-off-by: NPeter Hung <hpeter+linux_kernel@gmail.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Intel Penwell supports 3 HSUART ports which are 8250 compatible. The patch adds
necessary bits to the driver.

The functions have intel_mid_* prefix due to more than one platform will use
this code.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Convert the legacy system PM callbacks to new ones. Meanwhile, remove the
redudant calls to the PCI for changing a power state since it's done by bus
code.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

These quirk entries have the same effect as default
quirk entry, so we can just delete them.
Signed-off-by: NWang YanQing <udknight@gmail.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Commit 8b5c913f
("serial: 8250_pci: Add WCH CH352 quirk to avoid Xscale detection")
trigger one redundant entry report message.

This patch fix it.
Reported-by: NRussell King <rmk@arm.linux.org.uk>
Signed-off-by: NWang YanQing <udknight@gmail.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

I'm still receiving reports to my email address, so let's point this
at the linux-serial mailing list instead.

Cc: <stable@vger.kernel.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Signed-off-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

WCH384 4S board is a PCI-E card with 4 DB9 COM ports detected as
Serial controller: Device 1c00:3470 (rev 10) (prog-if 05 [16850])
Signed-off-by: NSergej Pupykin <ml@sergej.pp.ru>
Acked-by: NZany Yan <sirlight@cox.net>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The original driver fixed the io address with 0xe000+idx*8,
but real io address assigned from BIOS is dynamically from
read PCI configure space 0x24, 0x20, 0x1c.

The Fintek F81504/F81508/F81512 maybe malfunction without
this patch and malfunction surely when more then 1 PCI card.
Signed-off-by: NPeter Hung <hpeter+linux_kernel@gmail.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

WCH382 is a PCI-E card with 1 LPT and 2 DB9 COM ports detected as
Serial controller: Device 1c00:3250 (rev 10) (prog-if 05 [16850])
Signed-off-by: NSergej Pupykin <ml@sergej.pp.ru>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Check the return value of ioremap_nocache to make sure we got a
valid mapping.
Signed-off-by: NAaron Sierra <asierra@xes-inc.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Several init/setup functions passed the PCI BAR resource start address
to ioremap_nocache() via an unsigned long. This caused address truncation
for a 32-bit device mapped above 4 GiB (i.e. the CPU interacts with the
device via a translated address), which resulted in a kernel panic.

This patch replaces all of the instances of intermediate variable use
with pci_ioremap_bar() to ensure the full resource_size_t start address
is used and that ioremap_nocache() is still called.

The kernel panic (Exar XR17V358 PCIe device on a Freescale P2020 SBC):

Machine check in kernel mode.
Caused by (from MCSR=10008): Bus - Read Data Bus Error
Oops: Machine check, sig: 7 [#1]
SMP NR_CPUS=2 X-ES P2020
Modules linked in:
CPU: 1 PID: 1 Comm: swapper/0 Not tainted 3.14.15-xes_r2-00002-g560e401 #978
task: bf850000 ti: bffee000 task.ti: bf84c000
NIP: 80318e10 LR: 80319ecc CTR: 80318dfc
REGS: bffeff10 TRAP: 0204   Not tainted  (3.14.15-xes_r2-00002-g560e401)
MSR: 00021000 <CE,ME>  CR: 20adbe42  XER: 00000000
DEAR: c1058001 ESR: 00000000
GPR00: 00000000 bf84db30 bf850000 80cb4af8 00000001 00000000 80000007 80000000
GPR08: bf837c9c c1058001 00000001 00000000 80000007 00000000 80002a10 00000000
GPR16: 00000000 00000000 00000000 00000000 00000000 00000000 80cb0000 80c72dc4
GPR24: 80cb4900 fffffffe 00029000 00000001 bf8c11e8 ffffffea 80c72ce4 80cb4af8
NIP [80318e10] mem_serial_in+0x14/0x28
LR [80319ecc] serial8250_config_port+0x160/0xe38
Call Trace:
[bf84db30] [80319d94] serial8250_config_port+0x28/0xe38 (unreliable)
[bf84db60] [80315e3c] uart_add_one_port+0x148/0x3a4
[bf84dbf0] [8031bf40] serial8250_register_8250_port+0x2dc/0x3c8
[bf84dc20] [8032111c] pciserial_init_ports+0xd4/0x1c0
[bf84dd50] [803212f8] pciserial_init_one+0xf0/0x224
[bf84dd90] [802d8ff4] local_pci_probe+0x34/0x8c
[bf84dda0] [802d92c8] pci_device_probe+0x84/0xa0
[bf84ddc0] [80329ee0] driver_probe_device+0xac/0x26c
[bf84dde0] [8032a15c] __driver_attach+0xbc/0xc0
[bf84de00] [80328388] bus_for_each_dev+0x90/0xcc
[bf84de30] [80329cd0] driver_attach+0x24/0x34
[bf84de40] [80328e28] bus_add_driver+0x104/0x1fc
[bf84de60] [8032a8c8] driver_register+0x70/0x138
[bf84de70] [802d93c0] __pci_register_driver+0x48/0x58
[bf84de80] [8077e0e4] serial_pci_driver_init+0x24/0x34
[bf84de90] [80002228] do_one_initcall+0x34/0x1b0
[bf84df00] [80764294] kernel_init_freeable+0x138/0x1e8
[bf84df30] [80002a24] kernel_init+0x14/0x108
[bf84df40] [8000ef94] ret_from_kernel_thread+0x5c/0x64
Instruction dump:
800800c4 7d290214 39290001 7c0004ac 7ca049ae 7c0004ac 4e800020 88030035
81230008 7c840030 7d292214 7c0004ac <88690000> 0c030000 4c00012c 5463063e
---[ end trace e3c16443b5d573c6 ]---
Signed-off-by: NAaron Sierra <asierra@xes-inc.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Added recognition of EndRun Technologies PCIe PTP slave card
and setup two ttySx ports for communication with the card for
retrieval of PTP based time and to communicate with the card's
Linux OS.
Signed-off-by: NMike Skoog <mskoog@endruntechnologies.com>
Signed-off-by: NMike Korreng <mkorreng@endruntechnologies.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

It should not be used together with Auto Flow Control, and
Auto Flow Control is always enabled on Baytrail.
Signed-off-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Quark X1000 contains two designware derived 8250 serial ports.
Each port has a unique PCI configuration space consisting of
BAR0:UART BAR1:DMA respectively.

Unlike the standard 8250 the register width is 32 bits for RHR,IER etc
The Quark UART has a fundamental clock @ 44.2368 MHz allowing for a
bitrate of up to about 2.76 megabits per second.

This patch enables standard 8250 mode
Signed-off-by: NBryan O'Donoghue <pure.logic@nexus-software.ie>
Reviewed-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Add new PCI IDs to cover newer Intel SoCs such as Braswell.
Signed-off-by: NAlan Cox <alan@linux.intel.com>
Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>

That field has been deprecated in favour of getting the necessary information
from ACPI or DT.

However, we still need to deal systems that are PCI only (no ACPI to back up)
like Intel Bay Trail. In order to support such systems, we explicitly bind
setup() to the appropriate DMA filter function and its corresponding parameter.
Then when serial8250_request_dma() doesn't find the channel via ACPI or DT, it
falls back to use the given filter function.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>

It helps to cast struct uart_port to struct uart_8250_port at runtime.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Add support for Advantech PCM-3614I/PCM-3618I serial expansion cards

Advantech makes a variety of serial port expansion cards, including the
PCM-3614 and PCM-3618
(http://www.advantech.com/products/1-2JKLU5/PCM-3618/mod_5DF8DE5A-6B49-4429-BB2F-CB35FE1D168D.aspx).
They have a driver available which was forked from the kernel driver
ages ago and has not been maintained in quite some time, available at
http://support.advantech.com.tw/Support/DownloadSRDetail_New.aspx?SR_ID=1-1W8FZ5&Doc_Source=Download
Their driver added several features to aid in communications at higher
baud rates, but at normal serial port speeds, the standard 8250_pci
driver functions just fine. This patch adds the necessary PCI IDs to
recognize this card.

See bug 75681 (https://bugzilla.kernel.org/show_bug.cgi?id=75681)
Signed-off-by: NThomee Wright <TWright@TMCDesign.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

This Multi-IO card has one serial 16550-like and one parallel port connector.
Here's the lspci output, after this commit is applied:

03:07.0 Serial controller: Device 4348:5053 (rev 10) (prog-if 02 [16550])
	Subsystem: Device 4348:5053
	Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Interrupt: pin A routed to IRQ 21
	Region 0: I/O ports at cf00 [size=8]
	Region 1: I/O ports at ce00 [size=8]
	Kernel driver in use: parport_serial
	Kernel modules: 8250_pci, parport_serial

This commit adds an entry with the device ID to the blacklist declared in
8250_pci to prevent the driver from taking ownership. Also, and as was done
for the 2S/1P variant, add a quirk to skip autodetection and set the correct
type to 16550A clone.

Proper entries are added to parport_serial, to support the device parallel
and serial ports.

Cc: Gianluca Anzolin <gianluca@sottospazio.it>
Cc: Alan Cox <alan@linux.intel.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The Intel BayTrail HSUART power-on default reference clock is 44.2368 MHz,
but 73.728 MHz provides 0% error for additional "conventional" baud rates
above 460800 (e.g. 576000, 921600, and 1152000).
Signed-off-by: NAaron Sierra <asierra@xes-inc.com>
Reviewed-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Support the following additional baud rates with 0% error:
	500000, 1500000, 2500000, 3500000
Signed-off-by: NAaron Sierra <asierra@xes-inc.com>
Reviewed-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Aparently 9865 uses standard BAR encoding scheme (unlike 99xx cards).
Current pci_netmos_9900_setup() uses wrong BAR indices for the 9865 PCI
device, function 2. Using standard BAR indices makes all 6 ports work
for me. Thus disable the NetMos 9900 quirk for NetMos 9865 pci device.

For the reference, here is the relevant part of lspci for my device:

02:07.0 Serial controller: MosChip Semiconductor Technology Ltd. PCI
9865 Multi-I/O Controller (prog-if 02 [16550])
	Subsystem: Device a000:1000
	Flags: bus master, medium devsel, latency 32, IRQ 17
	I/O ports at ac00 [size=8]
	Memory at fcfff000 (32-bit, non-prefetchable) [size=4K]
	Memory at fcffe000 (32-bit, non-prefetchable) [size=4K]
	Capabilities: [48] Power Management version 2
	Kernel driver in use: serial

02:07.1 Serial controller: MosChip Semiconductor Technology Ltd. PCI
9865 Multi-I/O Controller (prog-if 02 [16550])
	Subsystem: Device a000:1000
	Flags: bus master, medium devsel, latency 32, IRQ 18
	I/O ports at a800 [size=8]
	Memory at fcffd000 (32-bit, non-prefetchable) [size=4K]
	Memory at fcffc000 (32-bit, non-prefetchable) [size=4K]
	Capabilities: [48] Power Management version 2
	Kernel driver in use: serial

02:07.2 Communication controller: MosChip Semiconductor Technology Ltd.
PCI 9865 Multi-I/O Controller
	Subsystem: Device a000:3004
	Flags: bus master, medium devsel, latency 32, IRQ 19
	I/O ports at a400 [size=8]
	I/O ports at a000 [size=8]
	I/O ports at 9c00 [size=8]
	I/O ports at 9800 [size=8]
	Memory at fcffb000 (32-bit, non-prefetchable) [size=4K]
	Capabilities: [48] Power Management version 2
	Kernel driver in use: serial
Signed-off-by: NDmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

None of these files are actually using any __init type directives
and hence don't need to include <linux/init.h>.  Most are just a
left over from __devinit and __cpuinit removal, or simply due to
code getting copied from one driver to the next.
Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Signed-off-by: NYegor Yefremov <yegorslists@googlemail.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>