1. 27 3月, 2014 1 次提交
  2. 17 1月, 2014 1 次提交
    • B
      clk: sirf: re-arch to make the codes support both prima2 and atlas6 · 7bf21bc8
      Barry Song 提交于
      sirfprima2 and sirfatlas6 are two different SoCs in CSR SiRF series. for
      prima2 and atlas6, there are many shared clocks but there are still
      some different register layout and hardware clocks, then result in
      different clock table.
      
      here we re-arch the driver to
      1. clk-common.c provides common clocks for prima2 and atlas6,
      2. clk-prima2.h describles registers of prima2 and clk-prima2.c provides
      prima2 specific clocks and clock table.
      3. clk-atlas6.h describles registers of atlas6 and clk-atlas6.c provides
      atlas6 specific clocks and clock table.
      4. clk.h and clk.c expose external interfaces and provide uniform entry
      for both prima2 and atlas6.
      
      so both prima2 and atlas6 will get support by drivers/clk/sirf.
      Signed-off-by: NBarry Song <Baohua.Song@csr.com>
      Signed-off-by: NRongjun Ying <Rongjun.Ying@csr.com>
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      7bf21bc8
  3. 30 9月, 2013 1 次提交
  4. 09 8月, 2013 1 次提交
  5. 23 3月, 2013 1 次提交
  6. 19 1月, 2013 1 次提交
    • B
      clk: prima2: enable dt-binding clkdev mapping · eb8b8f2e
      Barry Song 提交于
      this patche deletes hard code that registers clkdev by things like:
      clk_register_clkdev(clk, NULL, "b0030000.nand");
      clk_register_clkdev(clk, NULL, "b0040000.audio");
      clk_register_clkdev(clk, NULL, "b0080000.usp");
      prima2 clock controller becomes a clock provider and  every dt node
      just declares its clock sources by dt prop.
      
      it also makes us easier to extend this driver to support both prima2
      and marco as marco has different address mapping with prima2.
      Signed-off-by: NBarry Song <Baohua.Song@csr.com>
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      eb8b8f2e
  7. 30 10月, 2012 1 次提交
  8. 25 8月, 2012 2 次提交
  9. 01 10月, 2011 1 次提交
  10. 11 9月, 2011 1 次提交
  11. 09 7月, 2011 1 次提交